L-Tile and H-Tile Avalon® Memory-mapped+ Intel® FPGA IP for PCI Express* User Guide

ID 683527
Date 3/05/2024
Public
Document Table of Contents

C.1. ebfm_barwr Procedure

The ebfm_barwr procedure writes a block of data from BFM shared memory to an offset from the specified Endpoint BAR. The length can be longer than the configured MAXIMUM_PAYLOAD_SIZE. The procedure breaks the request up into multiple transactions as needed. This routine returns as soon as the last transaction has been accepted by the VC interface module.

Location

altpcietb_g3bfm_rdwr.v

Syntax

ebfm_barwr(bar_table, bar_num, pcie_offset, lcladdr, byte_len, tclass)

Arguments

bar_table

Address of the Endpoint bar_table structure in BFM shared memory. The bar_table structure stores the address assigned to each BAR so that the driver code does not need to be aware of the actual assigned addresses only the application specific offsets from the BAR.

bar_num

Number of the BAR used with pcie_offset to determine PCI Express address.

pcie_offset

Address offset from the BAR base.

lcladdr

BFM shared memory address of the data to be written.

byte_len

Length, in bytes, of the data written. Can be 1 to the minimum of the bytes remaining in the BAR space or BFM shared memory.

tclass

Traffic class used for the PCI Express transaction.