L-Tile and H-Tile Avalon® Memory-mapped+ Intel® FPGA IP for PCI Express* User Guide

ID 683527
Date 9/13/2024
Public
Document Table of Contents

2.5. Compiling the Design Example and Programming the Device

  1. Navigate to <project_dir>/avmm_bridge_512_0_example_design/ and open pcie_example_design.qpf.
  2. On the Processing menu, select Start Compilation.
  3. After successfully compiling your design, program the targeted device with the Programmer.