Intel® Quartus® Prime Pro Edition User Guide: Getting Started

ID 683463
Date 10/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.9.1. Generating IP Simulation Files

The Intel® Quartus® Prime software optionally generates the functional simulation model, any testbench (or example design), and vendor-specific simulator setup scripts when you generate an IP core from IP Catalog. To specify options for the generation of IP simulation files:
  1. To specify your supported simulator and options for IP simulation file generation, click Assignment > Settings > EDA Tool Settings > Simulation.
  2. To parameterize a new IP variation, click Tools > IP Catalog.
    Figure 51. Simulation Options in Generation Dialog Box
  3. To enable generation of simulation files and generate the IP core synthesis and simulation files, in the parameter editor, click Generate HDL. The Generation dialog box appears.
  4. Under Simulation, specify Verilog or VHDL for the Create simulation model option.
  5. Turn on or off the ModelSim, VCS-MX, VCS, Riviera-Pro, or Xcelium option to generate simulator setup scripts for the simulation tool. If you turn on no simulator options, the scripts generate for all simulators.
  6. Click the Generate button. Platform Designer generates the simulation models and setup scripts for your system or IP component in the ( <your_project>/<ip name>sim/<vendor> directory.
    Figure 52. Generated Simulation Files Location

Did you find the information on this page useful?

Characters remaining:

Feedback Message