Streaming DMA Accelerator Functional Unit User Guide: Intel FPGA Programmable Acceleration Card D5005
ID
683424
Date
11/04/2019
Public
1. About this Document
2. Streaming DMA AFU Description
3. Memory Map and Address Spaces
4. Software Programming Model
5. Running the AFU Example
6. Compiling the Accelerator Function (AF)
7. Simulating the AFU Example
8. Streaming DMA Accelerator Functional Unit User Guide Archive
9. Document Revision History for Streaming DMA Accelerator Functional Unit User Guide
9. Document Revision History for Streaming DMA Accelerator Functional Unit User Guide
Document Version | Intel Acceleration Stack Version | Changes |
---|---|---|
2019.11.04 | 2.0.1 (supported with Intel® Quartus® Prime Pro Edition Edition 19.2) |
|
2019.08.05 | 2.0 (supported with Intel® Quartus® Prime Pro Edition 18.1.2) | Initial release. |