AN 708: Application Note - PCI Express DMA Reference Design Using External Memory
ID
683390
Date
5/17/2017
Public
Understanding PCI Express Throughput
The throughput in a PCI Express system depends on the following factors:
- Protocol overhead
- Payload size
- Completion latency
- Flow control update latency
- Devices forming the link
Protocol Overhead
Protocol overhead includes the following three components:
- 128b/130b Encoding and Decoding—Gen3 links use 128b/130b encoding. This encoding adds two synchronization (sync) bits to each 128-bit data transfer. Consequently, the encoding and decoding overhead is very small at 1.56%. The effective data rate of a Gen3 x8 link is about 8 gigabytes per second (GBps).
- Data Link Layer Packets (DLLPs) and Physical Layer Packets (PLPs)—An active link also transmits DLLPs and PLPs. The PLPs consist of SKP ordered sets which are 16-24 bytes. The DLLPs are two dwords. The DLLPs implement flow control and the ACK/NAK protocol.
- TLP Packet Overhead—The overhead associated with a single TLP ranges from 5-7 dwords if the optional ECRC is not included. The overhead includes the following fields:
- The Start and End Framing Symbols
- The Sequence ID
- A 3- or 4-dword TLP header
- The Link Cyclic Redundancy Check (LCRC)
- 0-1024 dwords of data payload
Figure 4. TLP Packet Format