AN 708: Application Note - PCI Express DMA Reference Design Using External Memory

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ID 683390
Date 5/17/2017
Public
Document Table of Contents
Document Table of Contents x
PCI Express DMA Reference Design Using External Memory
PCI Express DMA Reference Design Using External Memory x
Deliverables Included with the Reference Design Project Hierarchy Avalon-MM DMA Controller Reference Design DMA Operation Flow Running the Reference Design Understanding PCI Express Throughput Document Revision History
Project Hierarchy x
Parameter Settings for PCI Express Hard IP Variation
Running the Reference Design x
Installing the Driver and Application Installing the Windows Software Installing the Hardware Running the Linux DMA Software Running the Windows DMA Software
Understanding PCI Express Throughput x
Throughput for Posted Writes Throughput for Reads
Throughput for Posted Writes x
Specifying the Maximum Payload Size
PCI Express DMA Reference Design Using External Memory

Throughput for Posted Writes

The theoretical maximum throughput is calculated using the following formula: 

Throughput  = payload size / (payload size + overhead)
Figure 5. Maximum Throughput for Memory Writes The graph shows the maximum throughput with different TLP header and payload sizes. The DLLPs and PLPs are excluded from this calculation. Based on the graph, the theoretical maximum throughput on a Gen3 x8 link for a 3-dword posted write and no ECRC is 89.8%. The maximum throughput is 8 GBps x 89.8% = 7.19 GBps.

Section Content
Specifying the Maximum Payload Size

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