SDI II Intel® Stratix 10 FPGA IP Design Example User Guide

ID 683368
Date 12/09/2022

1. SDI II Intel® FPGA IP Design Example Quick Start Guide

Updated for:
Intel® Quartus® Prime Design Suite 22.4
IP Version 19.2.0
The Serial Digital Interface (SDI) II Intel FPGA IP design examples for Intel® Stratix® 10 devices feature a simulation testbench and a hardware design that supports compilation and hardware testing.

The SDI II Intel® FPGA IP offers the following design examples:

  • Parallel loopback with external voltage-controlled crystal oscillator (VCXO)
  • Parallel loopback without external VCXO
  • Serial loopback
When you generate a design example, the parameter editor automatically creates the files necessary to simulate, compile, and test the design in hardware.
Figure 1. Development Steps