1.7. 50G Interlaken IP Core v13.1 Arria 10 Edition
| Description | Impact | Notes |
|---|---|---|
| Added support for Arria 10 devices. IP core variations that target an Arria 10 device have additional interfaces and design requirements. |
| Old Signal Name | New Signal Name | Notes |
|---|---|---|
| — | tx_serial_clk | New interface to external TX PLL. Relevant for Arria 10 variations only. |
| — | tx_pll_locked | |
| — | tx_pll_powerdown | |
| — | tx_cal_busy | |
| — | reconfig_clk | New Arria 10 transceiver reconfiguration interface. Relevant for Arria 10 variations only. |
| — | reconfig_reset | |
| — | reconfig_read | |
| — | reconfig_write | |
| — | reconfig_address[12:0] | |
| — | reconfig_readdata[31:0] | |
| — | reconfig_waitrequest | |
| — | reconfig_writedata[31:0] | |
| reconfig_to_xcvr | Not present in Arria 10 variations. | Transceiver reconfiguration interface for Arria V and Stratix V variations. This interface is present only in Arria V and Stratix V variations (as supported in past and future versions of the Quartus II software). It is not present in Arria 10 variations. |
| reconfig_from_xcvr | Not present in Arria 10 variations. |