Intel® High Level Synthesis Compiler Pro Edition: Reference Manual

ID 683349
Date 12/19/2022

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7. Component Concurrency

The Intel® HLS Compiler assumes that you want a fully pipelined data path in your component. In the C++ implementation, think of a fully pipelined data path as calling a function multiple times before the first call has returned (see also Loops in Components and Intel HLS Compiler Hardware Model). That is, multiple invocations of a function, at different points in their executions, are executing at the same time. The Intel® HLS Compiler might not be able to deliver a component with a component initiation interval (II) of 1, or even any pipelining if there are data or memory dependencies between invocations of the component.

The Intel® HLS Compiler provides you with the hls_max_concurrency component attribute to help you control the maximum concurrency of your component.