DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 12/04/2023
Public
Document Table of Contents

14.4.39. Multiply (Mult)

The Mult block outputs the product of the inputs:

q = a × b

Note: For single-precision inputs and designs targeting any device with a floating-point DSP block, the block uses a mixture of resources including the DSP blocks in floating-point mode.

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Table 224.  Parameters for the Mult Block
Parameter Description
Output data type mode Determines how the block sets its output data type:
  • Inherit via internal rule: the number of integer and fractional bits is the maximum of the number of bits in the input data types.
  • Specify via dialog: you can set the output type of the block explicitly using additional fields that are available when this option is selected. This option reinterprets the output bit pattern from the LSB up according to the specified type.
  • Boolean: the output type is Boolean.
  • Variable precision floating point: variable precision floating-point output type
Output data type Specifies the output data type. For example, sfix(16), uint(8).
Floating point rounding Specifies what rounding to apply to the result:
  • Correct. IEEE compliant unbiased round to nearest output value.
  • Faithful. Saves hardware by sometimes rounding to the second nearest value. Error is about double that of correct rounding.
Output scaling value Specifies the output scaling value. For example, 2^-15.
Floating point precision Specifies the floating-point precision. For example, float32_m23.

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Table 225.  Port Interface for the Mult Block
Signal Direction Type Description Vector Data Support Complex Data Support
a Input Any fixed- or floating-point type Operand 1 Yes Yes
b Input Any fixed- or floating-point type Operand 2 Yes Yes
q Output Derived fixed- or floating-point type Result Yes Yes