AN 447: Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems

ID 683295
Date 3/28/2022

Guideline: Use Series Termination Resistor

Transmission line effects that cause large voltage deviation at the receiver are associated with impedance mismatch between the driver and transmission line. You can use a series termination resistor placed physically close to the driver to match the total driver impedance to transmission line impedance.

You can significantly reduce voltage overshoot by matching the impedance of the driver to the characteristic impedance of the transmission line.

If the driver device manufacturer specifies the driver buffer output impedance, you can use the following equation to determine the apropriate series termination value:

R driver+R seriesZ 0


  • R driver represents the intrinsic impedance of the driver
  • R series represents the resistance of the external series resistor

If the output impedance value of the driver is not available, you can run simulation with an IBIS model for the driver to determine the appropriate series termination resistor value for the interface.

Some drivers offer series on-chip termination (OCT) to minimize impedance mismatch to the transmission line. You can select a driver with R driver that closely matches the transmission line impedance in such cases. OCT provides sufficient impedance matching without the expense of additional external component.

Note: OCT affects the edge rates of the transmitted signal. You must evaluate if the timing impact causes a performance degradation of the interface.

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