AN 494: GPIO Pin Expansion Using I2C Bus Interface in Altera MAX Series

ID 683261
Date 9/22/2014
Give Feedback

1.3. GPIO Pin Expansion Using I2C Bus Interface Using MAX II Devices

The detailed description of the implementation is based on the MAX II devices. This application can also be implemented in MAX V and MAX 10 devices.

Figure 3. GPIO Pin Expansion Demonstration Circuit

Implementation involves using this design example source code and allocating I2C bus lines and GPIO pin expansion inputs and outputs to MAX II GPIOs. GPIO pin expansion is demonstrated on the MDN-B2 demo board with the help of an I2C simulator that is created using a PC parallel port and interfacing hardware to create an I2C compliant two-wire bus.

Details about setting up an I2C environment is described in the Dallas Semiconductor's Maxim application note AN3230. This utility program uses the parallel port and its interfacing hardware to interact with the MAX II device and provides the SDA and SCL connections, as required on an I2C two-wire system. When implemented, this design allows inputs from the MDN-B2 demo board (set via DIP switches) to reach the I2C master. Similarly, data sent by the I2C master is available on the GPIO output ports (connected to LEDs on the demo board) of the MAX II device. The I2C master in this demonstration is the user interface on the PC running the parallel port I2C software.

The following details the implementation of this design example on the MDN-B2 demo board.

Table 3.  EPM240G Pin Assignments
Signal Pin Signal Pin
SCLK pin 39 SDA pin 40
GPIO_output[0] pin 69 GPIO_output[1] pin 70
GPIO_output[2] pin 71 GPIO_output[3] pin 72
GPIO_output[4] pin 73 GPIO_output[5] pin 74
GPIO_output[6] pin 75 GPIO_output[7] pin 76
GPIO_input[0] pin 55 GPIO_input[1] pin 56
GPIO_input[2] pin 57 GPIO_input[3] pin 58
GPIO_input[4] pin 61 GPIO_input[5] pin 66
GPIO_input[6] pin 67 GPIO_input[7] pin 68
Note: Assign unused pins As input-tristated in the Quartus® II software. You must also enable the Auto Open-Drain setting on the SCLK and SDA pins. To do this, on the Assignments menu, click Settings and then select Analysis and Synthesis Settings to enable the Auto Open-Drain setting. These settings are followed by a compilation cycle.