O-RAN Intel® FPGA IP Design Example User Guide

ID 683218
Date 8/15/2023
Public

2.2.1. Simulating the O-RAN Design Example for Intel Agilex® 7 F-Tile Devices

When targeting Intel Agilex® 7 F-tile devices, the design example supports VCS, Questa, and Xcelium simulations only.
  1. Turn on Example Design > Files Types Generated > Simulation.
  2. Change the directory to <simulation design example> /simulation/quartus.
  3. Run these two commands:
    quartus_ipgenerate --run_default_mode_op oran_ed -c oran_ed
    quartus_tlg oran_ed..
  4. Change the directory to <simulation design example> /simulation/setup_scripts.
  5. Run this command: ip-setup-simulation --quartus-project=../quartus/oran_ed.qpf.
  6. For VCS:
    1. Change the directory to <simulation design example> /simulation/setup_scripts/synopsys/vcs.
    2. Run this command: sh run_vcs.sh.
  7. For Questa:
    1. Change the directory to <simulation design example>/simulation/setup_scripts/mentor
    2. Run this script in the Questa simulator: do run_vsim.do.
  8. For Xcelium:
    1. Change the directory to <simulation design example>/simulation/setup_scripts/xcelium
    2. Run this command: sh run_xcelium.sh