SDI II Intel® Arria 10 FPGA IP Design Example User Guide

ID 683209
Date 10/08/2021
Public

1. SDI II Intel® FPGA IP Design Example Quick Start Guide

Updated for:
Intel® Quartus® Prime Design Suite 21.3
IP Version 18.1
The Serial Digital Interface (SDI) II Intel FPGA IP design examples for Intel® Arria® 10 devices feature a simulation testbench and a hardware design that supports compilation and hardware testing.

The SDI II Intel® FPGA IP offers the following design examples:

  • Parallel loopback with external voltage-controlled crystal oscillator (VCXO)
  • Parallel loopback without external VCXO
  • Serial loopback
When you generate a design example, the parameter editor automatically creates the files necessary to simulate, compile, and test the design in hardware.
Figure 1. Development Steps