Quartus® Prime Pro Edition User Guide: Power Analysis and Optimization

ID 683174
Date 4/01/2024
Public
Document Table of Contents

1.1. Power Analysis Tools

The Quartus® Prime Design Suite provides tools to analyze the power consumption of your FPGA design at different stages of the design process.

  • Intel® FPGA Power and Thermal Calculator (PTC)—estimates power supply and system thermal requirements before compiling the design, or anytime during the design phase. Supports Agilex™ FPGA portfolio and Stratix® 10 devices.
  • Quartus® Prime Power Analyzer (QPA)—estimates power consumption for a post-fit design, allowing you establish guidelines for the power budget.
  • Early Power Estimator (EPE) spreadsheet—estimates power consumption for power supply planning before compiling the design. Supports Arria® 10 and Stratix® 10 devices. (For versions of the Quartus® Prime software later than version 19.4, Stratix® 10 devices are supported in the Intel® FPGA Power and Thermal Calculator.)
Figure 1. Estimation Accuracy for Different Inputs and Power Analysis Tools


The accuracy of the power model is determined on a per-power-rail basis for the Quartus® Prime Power Analyzer.
  • For most Stratix® 10 designs, the Quartus® Prime Power Analyzer has the following accuracy, assuming final power models: Within 10% of silicon for the majority of power rails with higher power, assuming accurate inputs and toggle rates.
  • For most Agilex™ FPGA portfolio designs, the Quartus® Prime Power Analyzer has the following accuracy, assuming final power models: Within 10% of silicon for all power rails, assuming accurate inputs and toggle rates.
Table 1.  Comparison of EPE/ Intel® FPGA PTC and Quartus® Prime Power Analyzer Capabilities
Characteristic EPE / PTC Quartus® Prime Power Analyzer
When to use Any time
Note: For post-fit power analysis, you get better results with the Quartus® Prime Power Analyzer.
Post-fit
Software requirements

EPE: Spreadsheet program.

Intel® FPGA PTC: Integrated into the Quartus® Prime software, and is also available as a standalone tool.

The Quartus® Prime software
Accuracy Medium Medium to very high
Data inputs
  • Resource usage estimates
  • Clock requirements
  • Environmental conditions
  • Toggle rate
  • Post-fit design
  • Clock requirements
  • Signal activity defaults
  • Environmental conditions
  • Register transfer level (RTL) simulation results (optional)
  • Post-fit simulation results (optional)
  • Signal activities per node or entity (optional)
Data outputs
Note: The EPE and Power Analyzer outputs vary by device family.
  • Total thermal power dissipation
  • Thermal static power
  • Thermal dynamic power
  • Off-chip power dissipation
  • Current drawn from voltage supplies
  • Total thermal power
  • Thermal static power
  • Thermal dynamic power
  • Thermal I/O power
  • Thermal power by design hierarchy
  • Thermal power by block type
  • Thermal power dissipation by clock domain
  • Device supply currents
Estimation of transceiver power for dynamic reconfiguration features Includes an estimation of the incremental power consumption by these features. Not included
Note:
The Quartus® Prime Power Analyzer does not support power analysis of the following Intel® FPGA IP:
  • Stratix® 10 HBM2 IP
  • Stratix® 10 HPS IP
  • Arria® 10 HPS IP
In versions of the Quartus® Prime software later than 19.4, you can obtain power estimations for the Stratix® 10 HBM2 IP and Stratix® 10 HPS IP using the Intel® FPGA Power and Thermal Calculator (PTC).

For power estimation of Arria® 10 HPS IP, and for power estimation in the Quartus® Prime software version 19.4 or earlier, you can obtain power estimations using the Early Power Estimator spreadsheet (EPE).