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Visible to Intel only — GUID: iga1404929653894
Ixiasoft
Visible to Intel only — GUID: iga1404929653894
Ixiasoft
10.3.6. Driver Examples
Below is a simple test program to verify that the Intel FPGA 16550 UART driver support is functional.
The test reads, validates, and writes a modified baud rate, data bits, stop bits, parity bits to the UART before attempting to write a character stream to it from UART0 to UART1 and vice verse (ping pong test). This also tests the FIFO and FIFO-less mode to ensure the IP is functioning for FIFO.
- An instance of UART named "a_16550_uart_0" and another instance UART named "a_16550_uart_1".
- Both UARTs need to be connected in loopback in Intel® Quartus® Prime software.
- Non-blocking UART support
- UART HAL driver
- HAL open/write support
The test will print "ALL TESTS PASS" from the UART to indicate success.
Verifying Intel FPGA 16550 UART Driver Support functionality
#include <stdio.h>
#include <stdlib.h>
#include <sys/ioctl.h>
#include <sys/termios.h>
#include <fcntl.h>
#include <string.h>
#include <unistd.h>
#include <sys/time.h>
#include <time.h>
#include "system.h"
#include "altera_16550_uart.h"
#include "altera_16550_uart_regs.h"
#include <wchar.h>
#define ERROR -1
#define SUCCESS 0
#define MOCK_UART
#define BUFSIZE 512
wchar_t TXMessage[BUFSIZE] = L"Hello World";
wchar_t RXMessage[BUFSIZE] = L"";
int UARTDefaultConfig(UartConfig *Config)
{
Config->stop_bit = STOPB_1;
Config->parity_bit = NO_PARITY;
Config->data_bit = CS_8;
Config->baudrate = BR115200;
Config->fifo_mode = 0;
Config->hwfc = 0;
Config->rx_fifo_level= RXFULL;
Config->tx_fifo_level= TXEMPTY;
return 0;
}
int UARTBaudRateTest()
{
UartConfig *UART0_Config = malloc(1*sizeof(UartConfig));
UartConfig *UART1_Config = malloc(1*sizeof(UartConfig));
int i=0, j=0, direction=0, Match=0;
const int nBaud = 5;
int BaudRateCoverage[]= {BR9600, BR19200, BR38400, BR57600, BR115200};
altera_16550_uart_state* uart_0;
altera_16550_uart_state* uart_1;
printf("============ UART Baud Rate Test Starts Here ===============\n");
uart_0 = altera_16550_uart_open ("/dev/a_16550_uart_0");
uart_1 = altera_16550_uart_open ("/dev/a_16550_uart_1");
for (direction=0; direction<2; direction++)
{
for (i=0; i<nBaud; i++)
{
UARTDefaultConfig(UART0_Config);
UARTDefaultConfig(UART1_Config);
UART0_Config->baudrate=BaudRateCoverage[i];
UART1_Config->baudrate=BaudRateCoverage[i];
printf("Testing Baud Rate: %d\n", UART0_Config->baudrate);
if(ERROR == alt_16550_uart_config (uart_0, UART0_Config)) return ERROR;
if(ERROR == alt_16550_uart_config (uart_1, UART1_Config)) return ERROR;
switch(direction)
{
case 0:
printf("Ping Pong Baud Rate Test: UART#0 to UART#1\n");
for(j=0; j<wcslen(TXMessage); j++)
{
altera_16550_uart_write(uart_0, &TXMessage[j], 1, 0);
usleep(1000);
if(ERROR== altera_16550_uart_read(uart_1, RXMessage, 1, 0)) return ERROR;
if(TXMessage[j]==RXMessage[0]) Match=1; else return ERROR;
printf("Sent:'%c', Received:'%c', Match:%d\n", TXMessage[j], RXMessage[0], Match);
}
break;
case 1:
printf("Ping Pong Baud Rate Test: UART#1 to UART#0\n");
for(j=0; j<wcslen(TXMessage); j++)
{
altera_16550_uart_write(uart_1, &TXMessage[j], 1, 0);
usleep(1000);
if(ERROR== altera_16550_uart_read(uart_0, RXMessage, 1, 0)) return ERROR;
if(TXMessage[j]==RXMessage[0]) Match=1; else return ERROR;
printf("Sent:'%c', Received:'%c', Match:%d\n", TXMessage[j], RXMessage[0], Match);
}
break;
default:
break;
}
usleep(1000);
}
}
free(UART0_Config);
free(UART1_Config);
return SUCCESS;
}
int UARTLineControlTest()
{
UartConfig *UART0_Config = malloc(1*sizeof(UartConfig));
UartConfig *UART1_Config = malloc(1*sizeof(UartConfig));
int x=0, y=0, z=0, Match=0;
const int nDataBit = 2, nParityBit=3, nStopBit=2;
int DataBitCoverage[]= { /*CS_5, CS_6,*/ CS_7, CS_8};
int ParityBitCoverage[]= {ODD_PARITY, EVEN_PARITY, NO_PARITY};
int StopBitCoverage[]= {STOPB_1, STOPB_2};
altera_16550_uart_state* uart_0;
altera_16550_uart_state* uart_1;
printf("================================ UART Line Control Test Starts Here =======================================\n");
uart_0 = altera_16550_uart_open ("/dev/a_16550_uart_0");
uart_1 = altera_16550_uart_open ("/dev/a_16550_uart_1");
for(x=0; x<nStopBit; x++)
{
for (y=0; y<nParityBit; y++)
{
for (z=0; z<nDataBit; z++)
{
UARTDefaultConfig(UART0_Config);
UARTDefaultConfig(UART1_Config);
UART0_Config->stop_bit=StopBitCoverage[x];
UART1_Config->stop_bit=StopBitCoverage[x];
UART0_Config->parity_bit=ParityBitCoverage[y];
UART1_Config->parity_bit=ParityBitCoverage[y];
UART0_Config->data_bit=DataBitCoverage[z];
UART1_Config->data_bit=DataBitCoverage[z];
printf("Testing : Stop Bit=%d, Data Bit=%d, Parity Bit=%d\n", UART0_Config->stop_bit, UART0_Config->data_bit, UART0_Config->parity_bit);
if(ERROR == alt_16550_uart_config (uart_0, UART0_Config)) return ERROR;
if(ERROR == alt_16550_uart_config (uart_1, UART1_Config)) return ERROR;
altera_16550_uart_write(uart_0, &TXMessage[0], 1, 0);
usleep(1000);
if(ERROR== altera_16550_uart_read(uart_1, RXMessage, 1, 0)) return ERROR;
if(TXMessage[0]==RXMessage[0]) Match=1; else
{
printf("Sent:'%c', Received:'%c', Match:%d\n", TXMessage[0], RXMessage[0], Match);
return ERROR;
}
printf("Sent:'%c', Received:'%c', Match:%d\n", TXMessage[0], RXMessage[0], Match);
}
}
}
free(UART0_Config);
free(UART1_Config);
return SUCCESS;
}
int UARTFIFOModeTest()
{
UartConfig *UART0_Config = malloc(1*sizeof(UartConfig));
UartConfig *UART1_Config = malloc(1*sizeof(UartConfig));
int i=0, direction=0, CharCounter=0, Match=0;
const int nBaud = 2;
int BaudRateCoverage[]= {BR115200, /*BR19200, BR38400, BR57600,*/ BR9600};
altera_16550_uart_state* uart_0;
altera_16550_uart_state* uart_1;
printf("================================ UART FIFO Mode Test Starts Here =======================================\n");
uart_0 = altera_16550_uart_open ("/dev/a_16550_uart_0");
uart_1 = altera_16550_uart_open ("/dev/a_16550_uart_1");
for (direction=0; direction<2; direction++)
{
for (i=0; i<nBaud; i++)
{
UARTDefaultConfig(UART0_Config);
UARTDefaultConfig(UART1_Config);
UART0_Config->baudrate=BaudRateCoverage[i];
UART1_Config->baudrate=BaudRateCoverage[i];
UART0_Config->fifo_mode = 1;
UART1_Config->fifo_mode = 1;
UART0_Config->hwfc = 0;
UART1_Config->hwfc = 0;
if(ERROR == alt_16550_uart_config (uart_0, UART0_Config)) return ERROR;
if(ERROR == alt_16550_uart_config (uart_1, UART1_Config)) return ERROR;
printf("Testing Baud Rate: %d\n", UART0_Config->baudrate);
switch(direction)
{
case 0:
printf("Ping Pong FIFO Test: UART#0 to UART#1\n");
CharCounter=altera_16550_uart_write(uart_0, &TXMessage, wcslen(TXMessage), 0);
//usleep(50000);
if(ERROR== altera_16550_uart_read(uart_1, RXMessage, wcslen(TXMessage), 0)) return ERROR;
if(strcmp(TXMessage, RXMessage)==0) Match=1; else Match=0;
printf("Sent:'%s' CharCount:%d, Received:'%s' CharCount:%d, Match:%d\n", TXMessage, CharCounter, RXMessage, wcslen(RXMessage), Match);
if(Match==0) return ERROR;
break;
case 1:
printf("Ping Pong FIFO Test: UART#1 to UART#0\n");
CharCounter=altera_16550_uart_write(uart_1, &TXMessage, wcslen(TXMessage), 0);
//usleep(50000);
if(ERROR== altera_16550_uart_read(uart_0, RXMessage, wcslen(TXMessage), 0)) return ERROR;
if(strcmp(TXMessage, RXMessage)==0) Match=1; else Match=0;
printf("Sent:'%s' CharCount:%d, Received:'%s' CharCount:%d, Match:%d\n", TXMessage, CharCounter, RXMessage, wcslen(RXMessage), Match);
if(Match==0) return ERROR;
break;
default:
break;
}
//usleep(100000);
}
}
free(UART0_Config);
free(UART1_Config);
return SUCCESS;
}
int main()
{
int result=0;
result = UARTBaudRateTest();
if(result==ERROR)
{
printf("UARTBaudRateTest FAILED\n");
return ERROR;
}
result = UARTLineControlTest();
if(result==ERROR)
{
printf("UARTLineControlTest FAILED\n");
return ERROR;
}
result = UARTFIFOModeTest();
if(result==ERROR)
{
printf("UARTFIFOModeTest FAILED\n");
return ERROR;
}
printf("\n\nALL TESTS PASS\n\n");
return 0;
}