Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP Cores Release Notes

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1. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP Cores Release Notes
1. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP Cores Release Notes x
1.1. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.5.0 1.2. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.4.1 1.3. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.4.0 1.4. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.2.1 1.5. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.2.0 1.6. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.1.1 1.7. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.1.0 1.8. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.0.0 1.9. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v19.2.0 1.10. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v19.1 1.11. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v18.1 1.12. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v18.0
1.1. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.5.0 x
1.1.1. RAM: 2-PORT Intel® FPGA IP v20.5.0
1.2. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.4.1 x
1.2.1. RAM: 2-PORT Intel® FPGA IP v20.4.1
1.3. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.4.0 x
1.3.1. RAM: 2-PORT Intel® FPGA IP v20.4.0
1.4. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.2.1 x
1.4.1. ROM: 1-PORT Intel® FPGA IP v20.2.1
1.5. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.2.0 x
1.5.1. ROM: 1-PORT Intel® FPGA IP v20.2.0 1.5.2. RAM: 2-PORT Intel® FPGA IP v20.2.0
1.6. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.1.1 x
1.6.1. RAM: 1-PORT Intel® FPGA IP v20.1.1 1.6.2. RAM: 4-PORT Intel® FPGA IP v20.1.1 1.6.3. ROM: 2-PORT Intel® FPGA IP v20.1.1
1.7. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v20.1.0 x
1.7.1. RAM: 1-PORT Intel® FPGA IP v20.1.0 1.7.2. RAM: 2-PORT Intel® FPGA IP v20.1.0 1.7.3. RAM: 4-PORT Intel® FPGA IP v20.1.0 1.7.4. ROM: 1-PORT Intel® FPGA IP v20.1.0 1.7.5. ROM: 2-PORT Intel® FPGA IP v20.1.0
1. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP Cores Release Notes

1.9. Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, RAM: 4-PORT, ROM: 1-PORT, and ROM: 2-PORT) Intel® FPGA IP v19.2.0

Table 27.  v19.2.0 2019.09.30
Quartus® Prime Version Description Impact
19.3 Initial release for Agilex™ 7 devices for the following embedded memory IP cores:
  • RAM: 1-PORT Intel® FPGA IP
  • RAM: 2-PORT Intel® FPGA IP
  • RAM: 4-PORT Intel® FPGA IP
  • ROM: 1-PORT Intel® FPGA IP
  • ROM: 2-PORT Intel® FPGA IP
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