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1. Design Example Quick Start Guide for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
2. Design Example Description for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
3. Document Revision History for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP Design Example User Guide
1.1. Creating an EMIF Project
1.2. Generating and Configuring the EMIF IP
1.3. Generating the Synthesizable EMIF Design Example
1.4. Generating the EMIF Design Example for Simulation
1.5. Simulation Versus Hardware Implementation
1.6. Simulating External Memory Interface IP With ModelSim
1.7. Pin Placement for Intel® Cyclone® 10 GX EMIF IP
1.8. Compiling and Programming the Intel® Cyclone® 10 GX EMIF Design Example
1.9. Debugging the Intel® Cyclone® 10 GX EMIF Design Example
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2. Design Example Description for External Memory Interfaces Intel® Cyclone® 10 GX FPGA IP
When you parameterize and generate your EMIF IP, you can specify that the system create directories for simulation and synthesis file sets, and generate the file sets automatically.
If you select Simulation or Synthesis under Example Design Files on the Example Designs tab, the system creates a complete simulation file set or a complete synthesis file set, in accordance with your selection.