PHY Lite for Parallel Interfaces FPGA IP Cores Release Notes

ID 683090
Date 3/31/2025
Public
Document Table of Contents

PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.1.0

Table 11.  v22.1.0 2022.06.21
Quartus® Prime Version Description Impact
22.2 Removed the channel_strobe_out_in port from phylite_tester entity which resolved the compilation error in the Questa* Intel® FPGA Edition software version 2022.1 while running a simulation of the VHDL-based design example of the PHY Lite for Parallel Interfaces Intel Agilex FPGA IP. Use the latest version of the Quartus® Prime Pro Edition software.