25G Ethernet Intel® FPGA IP Release Notes

ID 683067
Date 9/26/2022
Public

2.3. 25G Ethernet Intel® FPGA IP v19.3.0

Table 4.  v19.3.0 2019.09.30
Intel® Quartus® Prime Version Description Impact
19.3 For a MAC+PCS+PMA variant, the transceiver wrapper module name is now dynamically generated. This prevents unwanted module collision if multiple instances of the IP are being used in a system.

Did you find the information on this page useful?

Characters remaining:

Feedback Message