Interlaken (2nd Generation) Intel® FPGA IP Release Notes

ID 683052
Date 11/04/2020
Public

1. Interlaken (2nd Generation) Intel® FPGA IP FPGA IP Release Notes

If a release note is not available for a specific IP core version, the IP core has no changes in that version. For information on IP update releases up to v18.1, refer to the Intel Quartus Prime Design Suite Update Release Notes.

Intel® FPGA IP versions match the Intel® Quartus® Prime Design Suite software versions until v19.1. Starting in Intel® Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.

The Intel® FPGA IP version (X.Y.Z) number can change with each Intel® Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Intel® Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.

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