Intel® Quartus® Prime Pro Edition User Guide: Programmer

ID 683039
Date 10/04/2021
Public

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1.1. Generating Primary Device Programming Files

By default, the Compiler's Assembler module generates the primary device programming files at the end of full compilation. Alternatively, you can start the Assembler independently any time after design place and route to generate primary device programming files, such as SRAM Object Files (.sof) for configuration of Intel® FPGAs.

Follow these steps to generate primary device programming files:

  1. To specify programming options that enable features in the primary device programming file, such as Configuration, Error Detection CRC, and device Security options, click Assignments > Device > Device & Pin Options. Device & Pin Options Dialog Box describes all options.1
    Figure 2. Device & Pin Options Dialog Box ( Intel® Stratix® 10 Design)
  2. To generate primary device programming files, click Processing > Start > Start Assembler, or double-click Assembler on the Compilation Dashboard. The Assembler generates the programming files according to the options you specify.
  3. After running the Assembler, view detailed information about programming file generation, including the programming file Summary and Encrypted IP information in the Assembler report folder in the Compilation Report.
    Figure 3. Assembler Reports
    Note: Each successive release of the Intel® Quartus® Prime software typically includes:
    • Added support for new features in supported FPGA devices.
    • Added support for new devices.
    • Efficiency and performance improvements.
    • Improvements to compilation time and resource use of the design software.
    Due to these improvements, different versions of the Intel® Quartus® Prime Pro Edition, Intel® Quartus® Prime Standard Edition, and Intel® Quartus® Prime Lite Edition software can produce different programming files from release to release.
1 Security options not yet available for Intel® Agilex™ devices.