Developer Guide

Intel® oneAPI DPC++/C++ Compiler Handbook for FPGAs

ID 785441
Date 10/24/2024
Public
Document Table of Contents

Guidelines for Designing Pipes

Consider the following best practices when designing pipes:

  • Determine whether you should split the design into multiple kernels connected by pipes.
  • Aggregate data on pipes only when all the data is used at the same point in the kernel.
  • Do not use non-blocking pipes if you are using a looping structure waiting for the data, that is, avoid the following coding pattern for non-blocking pipe accessors:
bool success = false;
while (!success) {
  my_pipe::write(rd_src_buf[i], success); // can be a non-blocking read too
}
NOTE:

Whenever you use the above code pattern, use the corresponding blocking accessor instead because it is more efficient in hardware.