Visible to Intel only — GUID: GUID-D6E6000A-205B-4769-BBE1-CB9093A30CA6
Create a New Project
Use the Intel® C++ Compiler Classic
Select the Compiler Version
Specify a Base Platform Toolset
Use Property Pages
Use Intel® Libraries with Microsoft Visual Studio*
Include MPI Support
Use Guided Auto Parallelism in Microsoft Visual Studio*
Use Code Coverage in Microsoft Visual Studio*
Use Profile Guided Optimization in Microsoft Visual Studio*
Optimization Reports
Dialog Box Help
Options: Compilers dialog box
Use Intel® C++ Compiler Classic dialog box
Options: Intel Libraries for oneAPI dialog box
Options: Converter dialog box
Options: Optimization Reports dialog box
Options: Guided Auto Parallelism dialog box
Configure Analysis dialog box
Options: Profile Guided Optimization (PGO) dialog box
Profile Guided Optimization dialog box
Options: Code Coverage dialog box
Code Coverage dialog box
Code Coverage Settings dialog box
Alphabetical Option List
General Rules for Compiler Options
What Appears in the Compiler Option Descriptions
Optimization Options
Code Generation Options
Interprocedural Optimization Options
Advanced Optimization Options
Profile Guided Optimization Options
Optimization Report Options
OpenMP* Options and Parallel Processing Options
Floating-Point Options
Inlining Options
Output, Debug, and Precompiled Header Options
Preprocessor Options
Component Control Options
Language Options
Data Options
Compiler Diagnostic Options
Compatibility Options
Linking or Linker Options
Miscellaneous Options
Deprecated and Removed Compiler Options
Display Option Information
Alternate Compiler Options
Portability and GCC-compatible Warning Options
arch
ax, Qax
EH
fasynchronous-unwind-tables
fcf-protection, Qcf-protection
fdata-sections, Gw
fexceptions
ffunction-sections, Gy
fomit-frame-pointer, Oy
Gd
Gr
GR
guard
Gv
Gz
hotpatch
m
m32, m64, Qm32, Qm64
m80387
march
masm
mauto-arch, Qauto-arch
mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries
mconditional-branch, Qconditional-branch
minstruction, Qinstruction
momit-leaf-frame-pointer
mregparm
mregparm-version
mstringop-inline-threshold, Qstringop-inline-threshold
mstringop-strategy, Qstringop-strategy
mtune, tune
Qcxx-features
Qpatchable-addresses
Qsafeseh
regcall, Qregcall
x, Qx
xHost, QxHost
alias-const, Qalias-const
ansi-alias, Qansi-alias
ansi-alias-check, Qansi-alias-check
complex-limited-range, Qcomplex-limited-range
fargument-alias, Qalias-args
fargument-noalias-global
ffreestanding, Qfreestanding
fjump-tables
ftls-model
funroll-all-loops
guide, Qguide
guide-data-trans, Qguide-data-trans
guide-file, Qguide-file
guide-file-append, Qguide-file-append
guide-opts, Qguide-opts
guide-par, Qguide-par
guide-vec, Qguide-vec
ipp-link, Qipp-link
qdaal, Qdaal
qipp, Qipp
qmkl, Qmkl
qmkl-ilp64, Qmkl-ilp64
qopt-args-in-regs, Qopt-args-in-regs
qopt-assume-no-loop-carried-dep, Qopt-assume-no-loop-carried-dep
qopt-assume-safe-padding, Qopt-assume-safe-padding
qopt-block-factor, Qopt-block-factor
qopt-calloc
qopt-class-analysis, Qopt-class-analysis
qopt-dynamic-align, Qopt-dynamic-align
qopt-jump-tables, Qopt-jump-tables
qopt-malloc-options
qopt-matmul, Qopt-matmul
qopt-mem-layout-trans, Qopt-mem-layout-trans
qopt-multi-version-aggressive, Qopt-multi-version-aggressive
qopt-multiple-gather-scatter-by-shuffles, Qopt-multiple-gather-scatter-by-shuffles
qopt-prefetch, Qopt-prefetch
qopt-prefetch-distance, Qopt-prefetch-distance
qopt-prefetch-issue-excl-hint, Qopt-prefetch-issue-excl-hint
qopt-ra-region-strategy, Qopt-ra-region-strategy
qopt-streaming-stores, Qopt-streaming-stores
qopt-subscript-in-range, Qopt-subscript-in-range
qopt-zmm-usage, Qopt-zmm-usage
qoverride-limits, Qoverride-limits
qtbb, Qtbb
Qvla
scalar-rep, Qscalar-rep
simd, Qsimd
simd-function-pointers, Qsimd-function-pointers
unroll, Qunroll
unroll-aggressive, Qunroll-aggressive
use-intel-optimized-headers, Quse-intel-optimized-headers
vec, Qvec
vec-guard-write, Qvec-guard-write
vec-threshold, Qvec-threshold
vecabi, Qvecabi
finstrument-functions, Qinstrument-functions
fnsplit, Qfnsplit
Gh
GH
p
prof-data-order, Qprof-data-order
prof-dir, Qprof-dir
prof-file, Qprof-file
prof-func-groups
prof-func-order, Qprof-func-order
prof-gen, Qprof-gen
prof-gen-sampling
prof-hotness-threshold, Qprof-hotness-threshold
prof-src-dir, Qprof-src-dir
prof-src-root, Qprof-src-root
prof-src-root-cwd, Qprof-src-root-cwd
prof-use, Qprof-use
prof-use-sampling
prof-value-profiling, Qprof-value-profiling
Qcov-dir
Qcov-file
Qcov-gen
qopt-report, Qopt-report
qopt-report-annotate, Qopt-report-annotate
qopt-report-annotate-position, Qopt-report-annotate-position
qopt-report-embed, Qopt-report-embed
qopt-report-file, Qopt-report-file
qopt-report-filter, Qopt-report-filter
qopt-report-format, Qopt-report-format
qopt-report-help, Qopt-report-help
qopt-report-names, Qopt-report-names
qopt-report-per-object, Qopt-report-per-object
qopt-report-phase, Qopt-report-phase
qopt-report-routine, Qopt-report-routine
device-math-lib
fmpc-privatize
fopenmp-device-lib
par-affinity, Qpar-affinity
par-loops, Qpar-loops
par-num-threads, Qpar-num-threads
par-runtime-control, Qpar-runtime-control
par-schedule, Qpar-schedule
par-threshold, Qpar-threshold
parallel, Qparallel
parallel-source-info, Qparallel-source-info
qopenmp, Qopenmp
qopenmp-lib, Qopenmp-lib
qopenmp-link
qopenmp-simd, Qopenmp-simd
qopenmp-stubs, Qopenmp-stubs
qopenmp-threadprivate, Qopenmp-threadprivate
Qpar-adjust-stack
fast-transcendentals, Qfast-transcendentals
fimf-absolute-error, Qimf-absolute-error
fimf-accuracy-bits, Qimf-accuracy-bits
fimf-arch-consistency, Qimf-arch-consistency
fimf-domain-exclusion, Qimf-domain-exclusion
fimf-force-dynamic-target, Qimf-force-dynamic-target
fimf-max-error, Qimf-max-error
fimf-precision, Qimf-precision
fimf-use-svml, Qimf-use-svml
fma, Qfma
fp-model, fp
fp-port, Qfp-port
fp-speculation, Qfp-speculation
fp-stack-check, Qfp-stack-check
fp-trap, Qfp-trap
fp-trap-all, Qfp-trap-all
ftz, Qftz
Ge
mp1, Qprec
pc, Qpc
prec-div, Qprec-div
prec-sqrt, Qprec-sqrt
qsimd-honor-fp-model, Qsimd-honor-fp-model
qsimd-serialize-fp-reduction, Qsimd-serialize-fp-reduction
rcd, Qrcd
fgnu89-inline
finline
finline-functions
finline-limit
inline-calloc, Qinline-calloc
inline-factor, Qinline-factor
inline-forceinline, Qinline-forceinline
inline-level, Ob
inline-max-per-compile, Qinline-max-per-compile
inline-max-per-routine, Qinline-max-per-routine
inline-max-size, Qinline-max-size
inline-max-total-size, Qinline-max-total-size
inline-min-caller-growth, Qinline-min-caller-growth
inline-min-size, Qinline-min-size
Qinline-dllimport
c
debug (Linux* and macOS)
debug (Windows*)
Fa
FA
fasm-blocks
FC
fcode-asm
Fd
FD
Fe
feliminate-unused-debug-types, Qeliminate-unused-debug-types
femit-class-debug-always
fmerge-constants
fmerge-debug-strings
Fo
Fp
FR
fsource-asm
ftrapuv, Qtrapuv
fverbose-asm
g
gdwarf
Gm
grecord-gcc-switches
gsplit-dwarf
map-opts, Qmap-opts
o
pch
pch-create
pch-dir
pch-use
pdbfile
print-multi-lib
Qpchi
Quse-msasm-symbols
RTC
S
use-asm, Quse-asm
use-msasm
V (Windows*)
Y-
Yc
Yd
Yu
Zi, Z7, ZI
Zo
ansi
check
early-template-check
fblocks
ffriend-injection
fno-gnu-keywords
fno-implicit-inline-templates
fno-implicit-templates
fno-operator-names
fno-rtti
fnon-lvalue-assign
fpermissive
fshort-enums
fsyntax-only
ftemplate-depth, Qtemplate-depth
funsigned-bitfields
funsigned-char
GZ
H (Windows*)
help-pragma, Qhelp-pragma
intel-extensions, Qintel-extensions
J
restrict, Qrestrict
std, Qstd
strict-ansi
vd
vmb
vmg
vmm
vms
x (type option)
Za
Zc
Ze
Zg
Zp
Zs
align
auto-ilp32, Qauto-ilp32
auto-p32
check-pointers, Qcheck-pointers
check-pointers-dangling, Qcheck-pointers-dangling
check-pointers-mpx, Qcheck-pointers-mpx
check-pointers-narrowing, Qcheck-pointers-narrowing
check-pointers-undimensioned, Qcheck-pointers-undimensioned
falign-functions, Qfnalign
falign-loops, Qalign-loops
falign-stack
fcommon
fextend-arguments, Qextend-arguments
fkeep-static-consts, Qkeep-static-consts
fmath-errno
fminshared
fmudflap
fpack-struct
fpascal-strings
fpic
fpie
freg-struct-return
fstack-protector
fstack-security-check
fvisibility
fvisibility-inlines-hidden
fzero-initialized-in-bss, Qzero-initialized-in-bss
GA
Gs
GS
GT
homeparams
malign-double
malign-mac68k
malign-natural
malign-power
mcmodel
mdynamic-no-pic
mlong-double
no-bss-init, Qnobss-init
noBool
Qlong-double
Qsfalign
diag, Qdiag
diag-dump, Qdiag-dump
diag-enable=power, Qdiag-enable:power
diag-error-limit, Qdiag-error-limit
diag-file, Qdiag-file
diag-file-append, Qdiag-file-append
diag-id-numbers, Qdiag-id-numbers
diag-once, Qdiag-once
fnon-call-exceptions
traceback
w
w, W
Wabi
Wall
Wbrief
Wcheck
Wcheck-unicode-security
Wcomment
Wcontext-limit, Qcontext-limit
wd, Qwd
Wdeprecated
we, Qwe
Weffc++, Qeffc++
Werror, WX
Werror-all
Wextra-tokens
Wformat
Wformat-security
Wic-pointer
Winline
WL
Wmain
Wmissing-declarations
Wmissing-prototypes
wn, Qwn
Wnon-virtual-dtor
wo, Qwo
Wp64
Wpch-messages
Wpointer-arith
Wport
wr, Qwr
Wremarks
Wreorder
Wreturn-type
Wshadow
Wsign-compare
Wstrict-aliasing
Wstrict-prototypes
Wtrigraphs
Wuninitialized
Wunknown-pragmas
Wunused-function
Wunused-variable
ww, Qww
Wwrite-strings
Bdynamic
Bstatic
Bsymbolic
Bsymbolic-functions
cxxlib
dynamic-linker
dynamiclib
F (Windows*)
F (macOS)
fixed
Fm
fuse-ld
l
L
LD
link
MD
MT
no-libgcc
nodefaultlibs
no-intel-lib, Qno-intel-lib
nostartfiles
nostdlib
pie
pthread
shared
shared-intel
shared-libgcc
static
static-intel
static-libgcc
static-libstdc++
staticlib
T
u (Linux*)
v
Wa
Wl
Wp
Xlinker
Zl
Details about Intrinsics
Naming and Usage Syntax
References
Intrinsics for All Intel® Architectures
Data Alignment, Memory Allocation Intrinsics, and Inline Assembly
Intrinsics for Managing Extended Processor States and Registers
Intrinsics for the Short Vector Random Number Generator Library
Intrinsics for Instruction Set Architecture (ISA) Instructions
Intrinsics for Intel® Advanced Matrix Extensions (Intel(R) AMX) Instructions
Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) BF16 Instructions
Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) 4VNNIW Instructions
Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) 4FMAPS Instructions
Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) VPOPCNTDQ Instructions
Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Additional Instructions
Intrinsics for Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Instructions
Intrinsics for Later Generation Intel® Core™ Processor Instruction Extensions
Intrinsics for Intel® Advanced Vector Extensions 2 (Intel® AVX2)
Intrinsics for Intel® Advanced Vector Extensions
Intrinsics for Intel® Streaming SIMD Extensions 4 (Intel® SSE4)
Intrinsics for Intel® Supplemental Streaming SIMD Extensions 3 (SSSE3)
Intrinsics for Intel® Streaming SIMD Extensions 3 (Intel® SSE3)
Intrinsics for Intel® Streaming SIMD Extensions 2 (Intel® SSE2)
Intrinsics for Intel® Streaming SIMD Extensions (Intel® SSE)
Intrinsics for MMX™ Technology
Intrinsics for Advanced Encryption Standard Implementation
Intrinsics for Converting Half Floats
Intrinsics for Short Vector Math Library Operations (SVML)
Intrinsics for Arithmetic Operations
Intrinsics for Bit Manipulation Operations
Intrinsics for Comparison Operations
Intrinsics for Conversion Operations
Intrinsics for Load Operations
Intrinsics for Logical Operations
Intrinsics for Miscellaneous Operations
Intrinsics for Move Operations
Intrinsics for Set Operations
Intrinsics for Shift Operations
Intrinsics for Store Operations
Intrinsics for Arithmetic Operations
Intrinsics for Blend Operations
Intrinsics for Bit Manipulation Operations
Intrinsics for Broadcast Operations
Intrinsics for Comparison Operations
Intrinsics for Compression Operations
Intrinsics for Conversion Operations
Intrinsics for Expand and Load Operations
Intrinsics for Gather and Scatter Operations
Intrinsics for Insert and Extract Operations
Intrinsics for Load and Store Operations
Intrinsics for Miscellaneous Operations
Intrinsics for Move Operations
Intrinsics for Pack and Unpack Operations
Intrinsics for Permutation Operations
Intrinsics for Reduction Operations
Intrinsics for Set Operations
Intrinsics for Shuffle Operations
Intrinsics for Test Operations
Intrinsics for Typecast Operations
Intrinsics for Vector Mask Operations
Intrinsics for 3rd Generation Intel® Core™ Processor Instruction Extensions
Intrinsics for 4th Generation Intel® Core™ Processor Instruction Extensions
Intrinsics for Converting Half Floats that Map to 3rd Generation Intel® Core™ Processor Instructions
Intrinsics that Generate Random Numbers of 16/32/64 Bit Wide Random Integers
Intrinsics for Multi-Precision Arithmetic
Intrinsics that Allow Reading from and Writing to the FS Base and GS Base Registers
Intrinsics for Arithmetic Operations
Intrinsics for Arithmetic Shift Operations
Intrinsics for Blend Operations
Intrinsics for Bitwise Operations
Intrinsics for Broadcast Operations
Intrinsics for Compare Operations
Intrinsics for Fused Multiply Add Operations
Intrinsics for GATHER Operations
Intrinsics for Logical Shift Operations
Intrinsics for Insert/Extract Operations
Intrinsics for Masked Load/Store Operations
Intrinsics for Miscellaneous Operations
Intrinsics for Operations to Manipulate Integer Data at Bit-Granularity
Intrinsics for Pack/Unpack Operations
Intrinsics for Packed Move with Extend Operations
Intrinsics for Permute Operations
Intrinsics for Shuffle Operations
Intrinsics for Intel® Transactional Synchronization Extensions (Intel® TSX)
<span class='option'>_mm256_abs_epi8/16/32 </span>
<span class='option'>_mm256_add_epi8/16/32/64 </span>
<span class='option'>_mm256_adds_epi8/16 </span>
<span class='option'>_mm256_adds_epu8/16 </span>
<span class='option'>_mm256_sub_epi8/16/32/64 </span>
<span class='option'>_mm256_subs_epi8/16 </span>
<span class='option'>_mm256_subs_epu8/16 </span>
<span class='option'>_mm256_avg_epu8/16 </span>
<span class='option'>_mm256_hadd_epi16/32 </span>
<span class='option'>_mm256_hadds_epi16 </span>
<span class='option'>_mm256_hsub_epi16/32 </span>
<span class='option'>_mm256_hsubs_epi16 </span>
<span class='option'>_mm256_madd_epi16 </span>
<span class='option'>_mm256_maddubs_epi16 </span>
<span class='option'>_mm256_mul_epi32</span>
<span class='option'>_mm256_mul_epu32</span>
<span class='option'>_mm256_mulhi_epi16</span>
<span class='option'>_mm256_mulhi_epu16 </span>
<span class='option'>_mm256_mullo_epi16/32 </span>
<span class='option'>_mm256_mulhrs_epi16</span>
<span class='option'>_mm256_sign_epi8/16/32</span>
<span class='option'>_mm256_mpsadbw_epu8</span>
<span class='option'>_mm256_sad_epu8</span>
<span class='option'>_mm_broadcastss_ps, _mm256_broadcastss_ps</span>
<span class='option'>_mm256_broadcastsd_pd</span>
<span class='option'>_mm_broadcastb_epi8, _mm256_broadcastb_epi8</span>
<span class='option'>_mm_broadcastw_epi16, _mm256_broadcastw_epi16</span>
<span class='option'>_mm_broadcastd_epi32, _mm256_broadcastd_epi32</span>
<span class='option'>_mm_broadcastq_epi64, _mm256_broadcastq_epi64</span>
<span class='option'>_mm256_broadcastsi128_si256</span>
<span class='option'>_mm256_cmpeq_epi8/16/32/64</span>
<span class='option'>_mm256_cmpgt_epi8/16/32/64</span>
<span class='option'>_mm256_max_epi8/16/32</span>
<span class='option'>_mm256_max_epu8/16/32</span>
<span class='option'>_mm256_min_epi8/16/32</span>
<span class='option'>_mm256_min_epu8/16/32</span>
<span class='option'> _mm_fmadd_pd, _mm256_fmadd_pd</span>
<span class='option'> _mm_fmadd_ps, _mm256_fmadd_ps</span>
<span class='option'> _mm_fmadd_sd </span>
<span class='option'> _mm_fmadd_ss </span>
<span class='option'> _mm_fmaddsub_pd, _mm256_fmaddsub_pd</span>
<span class='option'> _mm_fmaddsub_ps, _mm256_fmaddsub_ps</span>
<span class='option'> _mm_fmsub_pd, _mm256_fmsub_pd</span>
<span class='option'> _mm_fmsub_ps, _mm256_fmsub_ps</span>
<span class='option'> _mm_fmsub_sd </span>
<span class='option'> _mm_fmsub_ss </span>
<span class='option'> _mm_fmsubadd_pd, _mm256_fmsubadd_pd</span>
<span class='option'> _mm_fmsubadd_ps, _mm256_fmsubadd_ps</span>
<span class='option'> _mm_fnmadd_pd, _mm256_fnmadd_pd</span>
<span class='option'> _mm_fnmadd_ps, _mm256_fnmadd_ps</span>
<span class='option'> _mm_fnmadd_sd</span>
<span class='option'> _mm_fnmadd_ss</span>
<span class='option'> _mm_fnmsub_pd, _mm256_fnmsub_pd</span>
<span class='option'> _mm_fnmsub_ps, _mm256_fnmsub_ps</span>
<span class='option'> _mm_fnmsub_sd</span>
<span class='option'> _mm_fnmsub_ss</span>
_mm_mask_i32gather_pd, _mm256_mask_i32gather_pd
<span class='option'>_mm_i32gather_pd, _mm256_i32gather_pd </span>
<span class='option'>_mm_mask_i64gather_pd, _mm256_mask_i64gather_pd </span>
<span class='option'>_mm_i64gather_pd, _mm256_i64gather_pd </span>
_mm_mask_i32gather_ps, _mm256_mask_i32gather_ps
<span class='option'>_mm_i32gather_ps, _mm256_i32gather_ps</span>
<span class='option'>_mm_mask_i64gather_ps, _mm256_mask_i64gather_ps</span>
<span class='option'>_mm_i64gather_ps, _mm256_i64gather_ps</span>
_mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32
<span class='option'>_mm_i32gather_epi32, _mm256_i32gather_epi32</span>
_mm_mask_i32gather_epi64,_mm256_mask_i32gather_epi64
<span class='option'>_mm_i32gather_epi64,_mm256_i32gather_epi64</span>
<span class='option'>_mm_mask_i64gather_epi32,_mm256_mask_i64gather_epi32</span>
<span class='option'>_mm_i64gather_epi32,_mm256_i64gather_epi32</span>
_mm_mask_i64gather_epi64,_mm256_mask_i64gather_epi64
<span class='option'>_mm_i64gather_epi64,_mm256_i64gather_epi64</span>
<span class='option'>_mm256_sll_epi16/32/64 </span>
<span class='option'>_mm256_slli_epi16/32/64 </span>
<span class='option'>_mm256_sllv_epi32/64 </span>
<span class='option'>_mm_sllv_epi32/64 </span>
<span class='option'>_mm256_slli_si256 </span>
<span class='option'>_mm256_srli_si256</span>
<span class='option'>_mm256_srl_epi16/32/64 </span>
<span class='option'>_mm256_srli_epi16/32/64 </span>
<span class='option'>_mm256_srlv_epi32/64 </span>
<span class='option'>_mm_srlv_epi32/64 </span>
<span class='option'>_bextr_u32/64 </span>
<span class='option'>_blsi_u32/64 </span>
<span class='option'>_blsmsk_u32/64 </span>
<span class='option'>_blsr_u32/64 </span>
<span class='option'>_bzhi_u32/64 </span>
<span class='option'>_pext_u32/64 </span>
<span class='option'>_pdep_u32/64 </span>
<span class='option'>_lzcnt_u32/64 </span>
<span class='option'>_tzcnt_u32/64 </span>
<span class='option'>_mm256_cvtepi8_epi16/32/64</span>
<span class='option'>_mm256_cvtepi16_epi32/64</span>
<span class='option'>_mm256_cvtepi32_epi64</span>
<span class='option'>_mm256_cvtepu8_epi16/32/64</span>
<span class='option'>_mm256_cvtepu16_epi32/64</span>
<span class='option'>_mm256_cvtepu32_epi64</span>
Intel® Transactional Synchronization Extensions (Intel® TSX) Overview
Intel® Transactional Synchronization Extensions (Intel® TSX) Programming Considerations
Intrinsics for Restricted Transactional Memory Operations
Intrinsics for Hardware Lock Elision Operations
Function Prototype and Macro Definitions
Details of Intel® Advanced Vector Extensions Intrinsics
Intrinsics for Arithmetic Operations
Intrinsics for Bitwise Operations
Intrinsics for Blend and Conditional Merge Operations
Intrinsics for Compare Operations
Intrinsics for Conversion Operations
Intrinsics to Determine Minimum and Maximum Values
Intrinsics for Load and Store Operations
Intrinsics for Miscellaneous Operations
Intrinsics for Packed Test Operations
Intrinsics for Permute Operations
Intrinsics for Shuffle Operations
Intrinsics for Unpack and Interleave Operations
Support Intrinsics for Vector Typecasting Operations
Intrinsics Generating Vectors of Undefined Values
<span class='option'>_mm256_add_pd</span>
<span class='option'>_mm256_add_ps</span>
<span class='option'>_mm256_addsub_pd</span>
<span class='option'>_mm256_addsub_ps</span>
<span class='option'> _mm256_hadd_pd</span>
<span class='option'>_mm256_hadd_ps</span>
<span class='option'>_mm256_sub_pd</span>
<span class='option'>_mm256_sub_ps</span>
<span class='option'>_mm256_hsub_pd</span>
<span class='option'> _mm256_hsub_ps</span>
<span class='option'>_mm256_mul_pd</span>
<span class='option'>_mm256_mul_ps</span>
<span class='option'> _mm256_div_pd</span>
<span class='option'> _mm256_div_ps</span>
<span class='option'> _mm256_dp_ps</span>
<span class='option'>_mm256_sqrt_pd</span>
<span class='option'>_mm256_sqrt_ps</span>