Word Count with MapReduce on FPGAs: Part 2


It is challenging to design data parallel programs and map them to various hardware targets. Data Parallel C++ (DPC++) is an open alternative for cross-architecture development, which aims to address this challenge. In this talk, we cover a popular distributed programming model called MapReduce and show how to adapt the model to process a large dataset on FPGAs. We present the word count problem to explain how to design a data parallel algorithm using the MapReduce paradigm. We describe a DPC++ implementation on FPGAs and demonstrate the design flow and relevant tools for performance analysis and optimization.

Watch Part 1


Speaker

Dr. Yan Luo is a professor in the department of electrical and computer engineering at the University of Massachusetts, Lowell. His research spans computer architecture, machine learning, and data analytics. He teaches undergraduate and graduate courses such as embedded systems and heterogeneous computing.

 

Product and Performance Information

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