In this session, Intel® FPGA software engineer Tanner Young-Schultz demonstrates how using the Intel® FPGA Add-on for oneAPI Base Toolkit to manage register transfer level (RTL) design abstraction, you can achieve performance comparable to high-level design—and do it in a fraction of the time and with better resource use.

Learn this technique by creating a video processing IP core that runs on Intel FPGAs, such as the Intel® Stratix® 10 FPGA and Intel® Agilex™ FPGA devices.

Learn more about:

  • A practical image-sensor ANR design
  • Techniques for closing the gap between RTL and HLD
  • C++ techniques to get better FPGA performance using HLD
  • How HLD can allow you to more easily target new architectures, including the design tradeoffs

 

 

Intel® FPGA Add-On for oneAPI Base Toolkit

Program these reconfigurable hardware accelerators to speed up specialized, data-centric workloads. This add-on requires installation of the Intel® oneAPI Base Toolkit.

Get It Now  Get the Add-On

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