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Intel® Emulation and Prototyping

Trying to keep pace with evolving ASIC and SoC verification requirements? Learn more about how Intel’s FPGA solutions enable verification of complex ASIC and SoC-based systems.

Are You Prepared for the Complexity of Next Generation ASIC Development?

ASIC and SoC-based systems continue to scale in complexity and design size, necessitating verification solutions with high levels of integration at reasonable costs. Intel's FPGA-based hardware-assisted verification solutions scale with next-generation complexity and design size, enabling shorter product cycles, faster verification, and a high degree of system integration without sacrificing cost efficacy.

Products

Intel® Stratix® 10 GX 10M FPGA

Featuring 10.2 million logic elements, 2304 user I/O pins, 308 Mb memory, and up to 48 transceivers providing up to 17.4 Gbps bandwidth, the Intel® Stratix® 10 GX 10M FPGA truly is the world’s largest and is geared toward ASIC prototyping and emulation workloads.

Intel® Stratix® 10 GX 2800 FPGA

Featuring 2.7 million logic elements, 1160 user I/O pins, 244 Mb memory, and up to 96 transceivers providing up to 17.4 Gbps bandwidth, the Intel® Stratix® 10 GX 2800 FPGA is well-suited for ASIC prototyping and emulation applications.


Learn more

Resources

Intel® Stratix® 10 Direct Interface Bus (DIB) FPGA IP User Guide

Learn how to instantiate and design the DIB Intel® Stratix® 10 FPGA IP, available only for the Intel® Stratix® 10 GX 10M FPGA.

Intel® Stratix® 10 Device Family Pin Connection Guidelines

Learn how to properly make device pin connections that comply with I/O assignment and placement rules.

Intel® Stratix® 10 Configuration User Guide

Learn about supported configuration schemes and how to properly configure Intel® Stratix® 10 devices.

Intel® Stratix® 10 High-Speed LVDS I/O User Guide

Learn about the architecture, features, design considerations, and implementation of Intel® Stratix® 10 High-Speed LVDS I/O.

Intel® Stratix® 10 GX FPGA Development Kit User Guide

Learn how to get started with the Intel® Stratix® 10 GX FPGA development board.

Intel® Stratix® 10 Device Datasheet

Learn about the electrical characteristics, switching characteristics, configuration specifications, and timing for Intel® Stratix® 10 devices.

Low Latency 40G for ASIC Proto Ethernet IP User Guide

Learn how to implement and design the Low Latency 40G Ethernet for ASIC Prototyping Intel® FPGA IP.

Ecosystem Spotlight

S2C Announces FPGA Prototyping System with 300M ASIC Gate Capacity Based on Four Intel® Stratix® 10 GX 10M FPGAs
PRO DESIGN’s proFPGA Quad Intel® Stratix® 10 GX 10M FPGA Prototyping System Has a Prototyping Capacity of 2B ASIC Gates
Intel® Stratix® 10 and Intel® Hyperflex monolithic fabric visual graphic chip
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