GTS CPRI PHY FPGA IP Register Map

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Agilex™ 5 FPGA D-Series and E-Series FPGA Documentation Index Agilex™ 5 E-Series FPGA and SoC FPGA Support

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2024-04-01
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Description

This is the register map that is located in the IP Registers chapter of the GTS CPRI PHY FPGA IP User Guide.

Usage instructions