仅对英特尔可见 — GUID: mwh1410383723620
Ixiasoft
2.3.4.5. 创建时钟组(set_clock_groups)
Set Clock Groups (set_clock_groups)约束使您能够指定设计中的哪些时钟是不相关的。默认情况下,Timing Analyzer假设所有具有公共基本(common base)或父时钟(parent clock)的时钟都相关,并且这些时钟域之间的所有传输都适用于时序分析。您可以通过切割时钟组(cutting clock groups)来排除时序分析中特定时钟域之间的传输。
set_clock_groups命令使您能够切断不同组中不相关时钟之间的时序。无论是指定 -exclusive还是-asynchronous组,Timing Analyzer都会执行相同的分析。使用-group选项定义组。Timing Analyzer排除每个独立组的时钟之间的时序路径。
下表显示了set_clock_groups的影响。
Dest\Source | A | B | C | D |
A | Analyzed | Cut | Cut | Cut |
B | Cut | Analyzed | Analyzed | Analyzed |
C | Cut | Analyzed | Analyzed | Analyzed |
D | Cut | Analyzed | Analyzed | Analyzed |
Dest\Source | A | B | C | D |
A | Analyzed | Analyzed | Cut | Cut |
B | Analyzed | Analyzed | Cut | Cut |
C | Cut | Cut | Analyzed | Analyzed |
D | Cut | Cut | Analyzed | Analyzed |
Dest\Source | A | B | C | D |
A | Analyzed | Cut | Cut | Cut |
B | Cut | Analyzed | Cut | Cut |
C | Cut | Cut | Analyzed | Analyzed |
D | Cut | Cut | Analyzed | Analyzed |
Dest\Source | A | B | C | D |
A | Analyzed | Cut | Analyzed | Cut |
B | Cut | Analyzed | Cut | Analyzed |
C | Analyzed | Cut | Analyzed | Cut |
D | Cut | Analyzed | Cut | Analyzed |
Dest\Source | A | B | C | D |
A | Analyzed | Cut | Analyzed | Analyzed |
B | Cut | Analyzed | Cut | Cut |
C | Analyzed | Cut | Analyzed | Analyzed |
D | Analyzed | Cut | Analyzed | Analyzed |