The ASSET ScanWorks® product family allows designers to quickly and easily test semiconductors, circuit boards, or entire systems during product design, manufacturing, and in-field maintenance. The ScanWorks product family works in conjunction with the IEEE Standard 1149.1 boundary-scan (JTAG) test specification.
ASSET ScanWorks in-system programming (ISP) tools support all Intel® FPGA devices that can be programmed in-system with Jam Standard Test and Programming Language (STAPL), Serial Vector Format (SVF), or the IEEE 1532 standard for in-system configuration. The programming files for the supported devices are created by Intel FPGA MAX+PLUS® II or Quartus® II software.
Visit ASSET InterTech, Inc. at http://www.asset-intertech.com to learn more about their boundary-scan diagnostic and test systems used to perform in-system programming of programmable logic devices (PLDs).
For more information, contact ASSET InterTech, Inc. directly at:
Phone: (888) 694-6250
Fax: (972) 437-2826