i3c_secondary_master Address Map
DWC_mipi_i3c
Module Instance | Base Address | End Address |
---|---|---|
i_i3c_secondary_master__i3c_s_apb_slv__10da1000__DWC_mipi_i3c_block__SEG_L4_SP_i3c1_0x0_0x1000
|
0x10DA1000
|
0x10DA12FF
|
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
DEVICE_CTRL
|
0x0
|
32
|
RW
|
0x00000000
|
Device Control Register |
DEVICE_ADDR
|
0x4
|
32
|
RW
|
0x80000000
|
Device Address Register |
HW_CAPABILITY
|
0x8
|
32
|
RO
|
0x000F4103
|
Hardware Capability register |
COMMAND_QUEUE_PORT
|
0xC
|
32
|
WO
|
0x00000000
|
COMMAND_QUEUE_PORT |
RESPONSE_QUEUE_PORT
|
0x10
|
32
|
RO
|
0x00000000
|
RESPONSE_QUEUE_PORT |
TX_DATA_PORT
|
0x14
|
32
|
WO
|
0x00000000
|
Transmit Data Port Register |
IBI_QUEUE_STATUS
|
0x18
|
32
|
RO
|
0x00000000
|
In-Band Interrupt Queue Status Register |
QUEUE_THLD_CTRL
|
0x1C
|
32
|
RW
|
0x01000101
|
Queue Threshold Control Register |
DATA_BUFFER_THLD_CTRL
|
0x20
|
32
|
RW
|
0x01010101
|
Data Buffer Threshold Control Register |
IBI_QUEUE_CTRL
|
0x24
|
32
|
RW
|
0x00000000
|
IBI Queue Control Register |
IBI_MR_REQ_REJECT
|
0x2C
|
32
|
RW
|
0x00000000
|
IBI MR Request Rejection Control Register |
IBI_SIR_REQ_REJECT
|
0x30
|
32
|
RW
|
0x00000000
|
IBI SIR Request Rejection Control Register |
RESET_CTRL
|
0x34
|
32
|
RW
|
0x00000000
|
Reset Control Register |
SLV_EVENT_STATUS
|
0x38
|
32
|
RW
|
0x0000000B
|
Slave Event Status Register |
INTR_STATUS
|
0x3C
|
32
|
RW
|
0x00000000
|
Interrupt Status Register |
INTR_STATUS_EN
|
0x40
|
32
|
RW
|
0x00000000
|
Interrupt Status Enable Register |
INTR_SIGNAL_EN
|
0x44
|
32
|
RW
|
0x00000000
|
Interrupt Signal Enable Register |
INTR_FORCE
|
0x48
|
32
|
WO
|
0x00000000
|
Interrupt Force Enable Register |
QUEUE_STATUS_LEVEL
|
0x4C
|
32
|
RO
|
0x00000000
|
Queue Status Level Register |
DATA_BUFFER_STATUS_LEVEL
|
0x50
|
32
|
RO
|
0x00000020
|
Data Buffer Status Level Register |
PRESENT_STATE
|
0x54
|
32
|
RO
|
0x10000003
|
Present State Register |
CCC_DEVICE_STATUS
|
0x58
|
32
|
RW
|
0x00000000
|
Device Operating Status Register |
DEVICE_ADDR_TABLE_POINTER
|
0x5C
|
32
|
RO
|
0x000B0280
|
Pointer for Device Address Table Registers |
DEV_CHAR_TABLE_POINTER
|
0x60
|
32
|
RW
|
0x00020200
|
Pointer for Device Characteristics Table |
VENDOR_SPECIFIC_REG_POINTER
|
0x6C
|
32
|
RO
|
0x000000B0
|
Pointer for Vendor specific Registers |
SLV_MIPI_ID_VALUE
|
0x70
|
32
|
RW
|
0x00000000
|
Provisional ID Register |
SLV_PID_VALUE
|
0x74
|
32
|
RW
|
0x00000000
|
Provisional ID Register |
SLV_CHAR_CTRL
|
0x78
|
32
|
RW
|
0x00000042
|
I3C Slave Characteristic Register |
SLV_MAX_LEN
|
0x7C
|
32
|
RO
|
0x00FF00FF
|
I3C Max Write/Read Length Register |
MAX_READ_TURNAROUND
|
0x80
|
32
|
RW
|
0x00000000
|
MXDS Maximum Read Turnaround Time Register |
MAX_DATA_SPEED
|
0x84
|
32
|
RW
|
0x00000000
|
MXDS Maximum Data Speed Register |
SLV_INTR_REQ
|
0x8C
|
32
|
RW
|
0x00000000
|
Slave Interrupt Request Register |
DEVICE_CTRL_EXTENDED
|
0xB0
|
32
|
RW
|
0x00000000
|
Device Control Extended Register |
SCL_I3C_OD_TIMING
|
0xB4
|
32
|
RW
|
0x000A0010
|
SCL I3C Open Drain Timing Register |
SCL_I3C_PP_TIMING
|
0xB8
|
32
|
RW
|
0x000A000A
|
SCL I3C Push Pull Timing Register |
SCL_I2C_FM_TIMING
|
0xBC
|
32
|
RW
|
0x00100010
|
SCL I2C Fast Mode Timing Register |
SCL_I2C_FMP_TIMING
|
0xC0
|
32
|
RW
|
0x00100010
|
SCL I2C Fast Mode Plus Timing Register |
SCL_EXT_LCNT_TIMING
|
0xC8
|
32
|
RW
|
0x20202020
|
SCL Extended Low Count Timing Register |
SCL_EXT_TERMN_LCNT_TIMING
|
0xCC
|
32
|
RW
|
0x00000000
|
SCL Termination Bit Low count Timing Register |
SDA_HOLD_SWITCH_DLY_TIMING
|
0xD0
|
32
|
RW
|
0x00010000
|
SDA Hold and Mode Switch Delay Timing Register |
BUS_FREE_AVAIL_TIMING
|
0xD4
|
32
|
RW
|
0x00200020
|
Bus Free Timing Register |
BUS_IDLE_TIMING
|
0xD8
|
32
|
RW
|
0x00000020
|
Bus Idle Timing Register |
I3C_VER_ID
|
0xE0
|
32
|
RO
|
0x3130302A
|
DWC_mipi_i3c Version ID Register |
I3C_VER_TYPE
|
0xE4
|
32
|
RO
|
0x6C633033
|
DWC_mipi_i3c Version Type Register |
QUEUE_SIZE_CAPABILITY
|
0xE8
|
32
|
RO
|
0x00021244
|
DWC_mipi_i3c Queue Size Capability Register |
DEV_CHAR_TABLE1_LOC1
|
0x200
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device1 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE1_LOC2
|
0x204
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device1 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE1_LOC3
|
0x208
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device1 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE1_LOC4
|
0x20C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device1 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE2_LOC1
|
0x210
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device2 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE2_LOC2
|
0x214
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device2 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE2_LOC3
|
0x218
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device2 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE2_LOC4
|
0x21C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device2 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE3_LOC1
|
0x220
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device3 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE3_LOC2
|
0x224
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device3 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE3_LOC3
|
0x228
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device3 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE3_LOC4
|
0x22C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device3 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE4_LOC1
|
0x230
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device4 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE4_LOC2
|
0x234
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device4 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE4_LOC3
|
0x238
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device4 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE4_LOC4
|
0x23C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device4 1 |
DEV_CHAR_TABLE5_LOC1
|
0x240
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device5 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE5_LOC2
|
0x244
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device5 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE5_LOC3
|
0x248
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device5 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE5_LOC4
|
0x24C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device5 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE6_LOC1
|
0x250
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device6 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE6_LOC2
|
0x254
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device6 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE6_LOC3
|
0x258
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device6 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE6_LOC4
|
0x25C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device6 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE7_LOC1
|
0x260
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device7 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE7_LOC2
|
0x264
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device7 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE7_LOC3
|
0x268
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device7 This register is used in master mode of operation. 1 |
DEV_CHAR_TABLE7_LOC4
|
0x26C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device7 1 |
DEV_CHAR_TABLE8_LOC1
|
0x270
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-1 of Device8 1 |
DEV_CHAR_TABLE8_LOC2
|
0x274
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-2 of Device8 1 |
DEV_CHAR_TABLE8_LOC3
|
0x278
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-3 of Device8 1 |
DEV_CHAR_TABLE8_LOC4
|
0x27C
|
32
|
RO
|
0x00000000
|
Device Characteristic Table Location-4 of Device8 1 |
DEV_ADDR_TABLE_LOC1
|
0x280
|
32
|
RW
|
0x00000000
|
Device Address Table of Device1 |
DEV_ADDR_TABLE_LOC2
|
0x284
|
32
|
RW
|
0x00000000
|
Device Address Table of Device2 |
DEV_ADDR_TABLE_LOC3
|
0x288
|
32
|
RW
|
0x00000000
|
Device Address Table of Device3 |
DEV_ADDR_TABLE_LOC4
|
0x28C
|
32
|
RW
|
0x00000000
|
Device Address Table of Device4 |
DEV_ADDR_TABLE_LOC5
|
0x290
|
32
|
RW
|
0x00000000
|
Device Address Table of Device5 |
DEV_ADDR_TABLE_LOC6
|
0x294
|
32
|
RW
|
0x00000000
|
Device Address Table of Device6 |
DEV_ADDR_TABLE_LOC7
|
0x298
|
32
|
RW
|
0x00000000
|
Device Address Table of Device7 |
DEV_ADDR_TABLE_LOC8
|
0x29C
|
32
|
RW
|
0x00000000
|
Device Address Table of Device8 |
DEV_ADDR_TABLE_LOC9
|
0x2A0
|
32
|
RW
|
0x00000000
|
Device Address Table of Device9 |
DEV_ADDR_TABLE_LOC10
|
0x2A4
|
32
|
RW
|
0x00000000
|
Device Address Table of Device10 |
DEV_ADDR_TABLE_LOC11
|
0x2A8
|
32
|
RW
|
0x00000000
|
Device Address Table of Device11 |