DEVICE_ADDR

         

In the master mode of operation this Register is used to program the Device Dynamic Addresses and its respective valid bit.


In the slave mode of operation this Register reflects the Static and Dynamic Addresses and their respective valid bits of the slave controller.


Module Instance	Base Address	Register Address
`i_i3c_secondary_master__i3c_s_apb_slv__10da1000__DWC_mipi_i3c_block__SEG_L4_SP_i3c1_0x0_0x1000`	`0x10DA1000`	`0x10DA1004`

Size: 32

Offset: 0x4

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`DYNAMIC_ADDR_VALID` `RW 0x1`	`Reserved_3` `RO 0x0`								`DYNAMIC_ADDR` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`STATIC_ADDR_VALID` `RW 0x0`	`Reserved_1` `RO 0x0`								`STATIC_ADDR` `RW 0x0`

DEVICE_ADDR Fields

Bit Name Description Access Reset

DYNAMIC_ADDR_VALID

Dynamic Address Valid

This bit is used to control whether the DYNAMIC_ADDR is valid or not.

 - In I3C Main Master mode, the user sets this bit to 1 as it self-assigns its dynamic address.
 - In all other operation modes, the Controller sets this bit to 1 when Main Master assigns the Dynamic address during ENTDAA or SETDASA mechanism.


 - In I3C Slave Mode the Controller sets this bit to 1 when Main Master assigns the Dynamic address during ENTDAA or SETDASA mechanism.

Value	Description
0x0	Dynamic Address is invalid
0x1	Dynamic Address is valid

RW

0x1

30:23

Reserved_3

Reserved bitfield added by Magillem

RO

0x0

22:16

DYNAMIC_ADDR

Device Dynamic Address.

This field is used to program the Device Dynamic Address. The Controller uses this address for I3C transfers.

 - In Main Master mode, the user/application has to program the Dynamic Address through the Slave interface as it self-assigns its Dynamic Address.
 - In all other modes, the Main Master assigns this address during ENTDAA or SETDASA mechanism.


 - The Main Master assigns this address during ENTDAA or SETDASA mechanism.

RW

0x0

STATIC_ADDR_VALID

Static Address Valid.

In slave mode of operation this bit reflects the value of static_addr_en input port. The input port static_addr_en is expected to be driven to 1
only if the device supports I2C or I3C Static Address.

Value	Description
0x0	Static Address is invalid
0x1	Static Address is valid

RW

0x0

14:7

Reserved_1

Reserved bitfield added by Magillem

RO

0x0

6:0

STATIC_ADDR

Device Static Address.

In slave mode of operation this field reflects the value of static_addr input port. The controller uses this address to respond to
SETDASA CCC Command to get the Dynamic Address if static address is valid (static_addr_en port is set to 1).

RW

0x0