Rlpi0 Address Map

Contains registers with the GICR0 prefix.


Module Instance	Base Address	End Address
`i_aps_gic__gic_axi4_slave__1d000000__GICRlpi0`	`0x1D060000`	`0x1D06FFFF`


Register	Offset	Width	Access	Reset Value	Description
`GICR0_CTLR`	`0x0`	`32`	`RW`	`0x00000000`	GICR0_CTLR
`GICR0_IIDR`	`0x4`	`32`	`RO`	`0x0201743B`	GICR0_IIDR
`GICR0_TYPER`	`0x8`	`64`	`RO`	`0x0000000000000000`	GICR0_TYPER
`GICR0_WAKER`	`0x14`	`32`	`RW`	`0x00000006`	GICR0_WAKER
`GICR0_FCTLR`	`0x20`	`32`	`RW`	`0x00000000`	GICR0_FCTLR
`GICR0_PWRR`	`0x24`	`32`	`RW`	`0x0000000D`	GICR0_PWRR
`GICR0_CLASS`	`0x28`	`32`	`RW`	`0x00000000`	GICR0_CLASS
`GICR0_PROPBASER`	`0x70`	`64`	`RW`	`0x0000000000000000`	GICR0_PROPBASER
`GICR0_PENDBASER`	`0x78`	`64`	`RW`	`0x0000000000000000`	GICR0_PENDBASER
`GICR0_PIDR4`	`0xFFD0`	`32`	`RO`	`0x00000044`	GICR0_PIDR4
`GICR0_PIDR5`	`0xFFD4`	`32`	`RO`	`0x00000000`	GICR0_PIDR5
`GICR0_PIDR6`	`0xFFD8`	`32`	`RO`	`0x00000000`	GICR0_PIDR6
`GICR0_PIDR7`	`0xFFDC`	`32`	`RO`	`0x00000000`	GICR0_PIDR7
`GICR0_PIDR0`	`0xFFE0`	`32`	`RO`	`0x00000093`	GICR0_PIDR0
`GICR0_PIDR1`	`0xFFE4`	`32`	`RO`	`0x000000B4`	GICR0_PIDR1
`GICR0_PIDR2`	`0xFFE8`	`32`	`RO`	`0x0000003B`	GICR0_PIDR2
`GICR0_PIDR3`	`0xFFEC`	`32`	`RO`	`0x00000000`	GICR0_PIDR3
`GICR0_CIDR0`	`0xFFF0`	`32`	`RO`	`0x0000000D`	GICR0_CIDR0
`GICR0_CIDR1`	`0xFFF4`	`32`	`RO`	`0x000000F0`	GICR0_CIDR1
`GICR0_CIDR2`	`0xFFF8`	`32`	`RO`	`0x00000005`	GICR0_CIDR2
`GICR0_CIDR3`	`0xFFFC`	`32`	`RO`	`0x000000B1`	GICR0_CIDR3