GICR0_PIDR4

         GICR0_PIDR4


Module Instance	Base Address	Register Address
`i_aps_gic__gic_axi4_slave__1d000000__GICRlpi0`	`0x1D060000`	`0x1D06FFD0`

Size: 32

Offset: 0xFFD0

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`RESERVED0` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`RESERVED0` `RO 0x0`								`SIZE` `RO 0x4`				`DES_2` `RO 0x4`

GICR0_PIDR4 Fields


Bit	Name	Description	Access	Reset
31:8	`RESERVED0`	RESERVED0	`RO`	`0x0`
7:4	`SIZE`	SIZE	`RO`	`0x4`
3:0	`DES_2`	DES_2	`RO`	`0x4`