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  1. Nios® V Processor

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Nios® V Processor

Nios® V processors are the next generation of soft processor IPs, designed to bring the power and flexibility of the open-source RISC-V Architecture to FPGA environments. By leveraging the RISC-V instruction set architecture (ISA), the Nios V processors offer scalable solutions that enable a spectrum of applications ranging from simple embedded systems to complex, high-performance applications.

Altera has discontinued the Nios® II IP ordering codes. Refer to PDN 2312 for more information. It is recommended that customers migrate to Nios V.

Read the Nios® V Processor reference manual ›

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  • Embedded IP Suite

The Embedded IP Suite is a value bundle of embedded IP cores and software for FPGAs. The suite contains all the building blocks for your embedded design, including the Nios® V processor, DDR/DDR2/DDR3 memory controllers, a 16550 compatible UART, and a complete ethernet solution with the Intel® FPGA IP for Triple-Speed Ethernet.

Ordering Codes and Pricing

After you have purchased the license for your embedded IP core, you can obtain and manage the license through the Self-Service Licensing Center.

Visit the Self-Service Licensing Center

IP

Ordering Code

Primary

Renewal
Embedded IP Suite

Primary: IPS-EMBEDDED

Renewal: IPSR-EMBEDDED

Digikey

Mouser

Mouser
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Additional Resources

Find IP

Find the right Altera® FPGA Intellectual Property core for your needs.

Technical Support

For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.

IP Evaluation and Purchase

Evaluation mode and purchasing information for Altera® FPGA Intellectual Property cores.

IP Base Suite

Free Altera® FPGA IP Core licenses with an active license for Quartus® Prime Standard or Pro Edition Software.

Design Examples

Download design examples and reference designs for Altera® FPGA devices.

Contact Sales

Get in touch with sales for your Altera® FPGA product design and acceleration needs.

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