MediaLB Device Interface

MediaLB Device Interface

Features

  • MediaLB device interface
  • Based on the OS62400 MediaLB device interface macro from SMSC (Oasis)
  • MediaLB device physical and link layer requirements
  • Command and data transmission
  • Data reception and RxStatus response transmission
  • MediaLB lock detection
  • System channel command handling
  • 3-pin and 5-pin MediaLB device mode
  • Up to 15 channels: synchronous, asynchronous, isochronous, control
  • 124 bytes of data per frame
  • 256FS/512FS/1024FS
  • Parameterized
  • Avalon® interface for Nios® II processor

Block Diagram

Description

  • Small but efficient MediaLB device interface
  • Easily integrated into Nios II systems using SOPC Builder
  • Avalon interface for Nios II processor
  • Royalty-free
  • OS81050 module available
  • Verified on Nios II development boards
  • Evaluation version available

Device Utilization and Performance

Table 1 lists the typical device utilization results for the megafunction.

Target Device

Utilization

Parameter Setting

LEs

M4K Blocks

I/O Pins

Cyclone® II

~1,500

5

11

2 Channels

~4,500

5

11

15 Channels

Cyclone® III

~1,500

5

11

2 Channels

~4,500

5

11

15 Channels

Stratix® II

~1,500

5

11

2 Channels

~4,500

5

11

15 Channels

Stratix® III

~1,500

5

11

2 Channels

~4,500

5

11

15 Channels

Contact Information

For additional information, contact:

Ingenieurbüro Für IC-Technologie

Kleiner Weg 3

97877 Wertheim

GERMANY

Tel: +49/9342/96080

Fax: +49/9342/5381

Email: ifi@ifi-pld.de

URL: www.ifi-pld.de