The Siemens EDA AXI Verification IP Suite (Intel® FPGA Edition) provides bus functional models (BFMs) to simulate the behavior and to facilitate the verification of intellectual property (IP) that conforms to the Advanced Microcontroller Bus Architecture Advanced eXtensible Interface (AMBA* AXI) Protocol, with restrictions to simplify the application programming interface (API) for you.
The Siemens EDA AXI Verification IP Suite (Intel® FPGA Edition) contains the following BFMs:
Siemens EDA AXI3 BFM (Intel® FPGA Edition) with Master, Slave, and Inline Monitor interfaces
Siemens EDA AXI4 BFM (Intel® FPGA Edition) with Master, Slave, and Inline Monitor interfaces
AXI4-Lite with Master, Slave, and Inline Monitor BFMs
AXI4-Stream with Master, Slave, and Inline Monitor BFMs
Provides Verilog task-based API
Works in Siemens EDA, Cadence*, and Synopsys* simulators
Accelerates the verification process by providing key components of the verification testbench
Provides BFM components that implement the AMBA AXI protocol, serving as a reference for the protocol
Delivers a full suite of configurable assertion checking within each BFM
Provides full licenses at no additional cost as part of the IP Base Suite if you subscribe to the Intel® Quartus® Prime Standard Edition software.
Allows you to purchase licenses to the Siemens EDA Verification IP Suite or as part of the IP Base Suite if more than one seat is required or if you are using the Intel Quartus Prime Lite Edition software.
All of the Siemens EDA AXI Verification IP Suite (Intel® FPGA Edition) master, slave, and inline monitor BFM components are implemented in SystemVerilog. Also included are wrapper components so that the BFMs can be used in VHDL verification environments with simulators that support mix-language simulation.
Application Programming Interface
The Siemens EDA AXI Verification IP Suite (Intel® FPGA Edition) provides you with a set of APIs for each BFM that you can use to construct, instantiate, control, and query signals in all BFM components. Your test programs must use only these public access methods and events to communicate with each BFM.
The test program drives the stimulus to the design under test (DUTs) and determines whether the DUTs' behavior is correct by analyzing the responses. The BFMs translate the test program stimuli, which creates the signaling for the AMBA AXI protocol. The BFMs also check for protocol compliance by triggering an assertion when a protocol error is observed.