Stratix® V GX FPGA Development Kit

The Stratix® V GX FPGA Development Kit provides a complete design environment that includes all the hardware and software you need to begin developing FPGA designs immediately.

Use the Stratix® V GX FPGA Development Kit to:

  • Develop and test PCI Express* (PCIe) designs at data rates up to 3.0. using the PCIe short card form factor-compliant development board.
  • Develop and test memory subsystems for DDR3, QDR II+, or RLDRAM II memories.
  • Use the high-speed mezzanine card (HSMC) connectors to interface to one of over 35 different HSMCs provided by partners, supporting protocols such as Serial RapidIO*, 10 Gbps Ethernet, SONET, CPRI, OBSAI, and others.

Table 1. Ordering Information

Ordering Code Check Distributor Availability Stratix® V GX PFGA Devices
DK-DEV-5SGXEA7N

Mouser

DigiKey

 5SGXEA7K2F40C2N
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Table 2. Development Kit Contents and Features

What is included
Device

Stratix® V GX FPGA: 5SGXEA7K2F40C2N
Features and Connectors

Clocks

  • 50 MHz, 125 MHz, 100 MHz, and 148.5 MHz programmable oscillators
  • SMA input (LVPECL)

General user input and output

  • 10/100/1000Mbps Ethernet PHY (SGMII) with RJ-45 (copper) connector
  • 16x2 character LCD
  • One 8-position dual in-line package (DIP) switch
  • Sixteen user LEDs
  • Three user push buttons

Memory devices

  • DDR3 SDRAM (1,152 MB, x72 bit wide)
  • QDR II+ SRAM (4.5 MB, 2 Mb x18 bit wide)
  • Footprint compatible to QDR II 4 Mb x18 bit wide
  • RLDRAM II (72 MB CIO RLDRAM II with an 18 bit data bus)

Component and interfaces

  • PCIe x8 edge connector
  • Two HSMC connectors
  • SMB for serial digital interface (SDI) input and output
  • QSFP optical cage
  • 10/100/1000Mbps Ethernet PHY (SGMII) with RJ-45 (copper) connector
Cables and Adapters
  • Laptop DC input
  • PCIe edge connector
  • Nios® II processor web server and remote system update
Software  A one-year license for the Quartus® Prime Pro Edition design software is available upon purchase of the kit. Refer to the license activation instructions and FAQs.
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Table 3. Documentation

 Design Files

Content Description
User Guide Documentation about setting up the development kit and using the included software (Quartus® Prime and installer package).
Reference Manual (For boards with ES Silicon) Detailed information about board components and interfaces.

Kit installation › (for boards with ES silicon version 11.1)

Kit installation › (for boards with ES silicon version 11.2.1)

Kit installation › (version 12)

Kit installation (EXE) › (Windows13.0.0.0)

Kit installation (ZIP) › (Linux 13.0.0.0)

 A single installation file containing:
  • User Guide - Contains the user guide
  • Design Files - Contains schematics, and layout, Assembly, Bill of Materials
  • Examples - Board Test System: BTS GUI, Power GUI and Clock GUI
  • Examples - Golden Top project for pinout assignments management
  • Examples - Design Examples: Memory, XCVR, GPIO and PCIe 4.0

Download and unzip the Design Files first, then install the Board Test System.
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Note:

Buyer represents that it is a product developer, software developer or system integrator and acknowledges that this product is an evaluation kit that is not FCC authorized, is made available solely for evaluation and software development, and may not be resold.

Additional Resources

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Design Store

Altera® FPGA design examples provide efficient solutions for common design challenges. Visit the Design Store for Altera® FPGAs and RocketBoards.org to learn more.

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