Military Videos and Webcasts

Videos

This webcast looks at how mitigating soft errors through error correction code (ECC) can improve your embedded designs. (Hans Spanjaart, Sr. Technical Marketing Manager)

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Watch this webcast to find out about a new technology for FPGAs called OpenCL™. You'll learn about the market drivers and embedded technology enablers, the benefits of using FPGAs as hardware accelators, and how OpenCL™ fits in an FPGA-based design environment. (Jordon Inkeles, Sr. Manager, Software and DSP)

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Watch this webcast to find out how a customizable solution and quick intellectual property (IP) integration helps you build your video design faster – whether for simple format conversion or advanced digital video processing. (Richard Yang, Sr. Product Marketing Engineer)

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When choosing your FPGA design software, be sure to consider compile time, a key productivity advantage. In this webcast, you'll learn how the Intel Quartus® design software delivers a 2X to 3X compile time advantage over competitive software. (Richard Yang, Product Marketing Engineer)

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Learn about key innovations in Stratix® V FPGAs that address bandwidth and power challenges in high-end systems designs. Embedded HardCopy Blocks, power-efficient 28-Gbps transceivers, and software power optimization are just a few of the features that will help you balance bandwidth, power, and cost requirements. (Frank Yazbeck, Senior Technical Marketing Staff)

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Developing network surveillance cameras? Watch this webcast to see how an FPGA provides a single-chip platform for these cameras. Learn about a full video surveillance solution that includes silicon and intellectual property.Image processing for wide dynamic range (WDR) CMOS sensors (Judd Heape, Sr. Strategic Marketing Manager, Industrial Business Unit)

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See how DSP Builder for Intel FPGAs (Advanced Blockset) lets you optimize your large design's performance while reducing design iterations. Using a sensor (radar) front-end design example on a large FPGA, you'll see how DSP Builder simplifies and speeds your design process. (Michael Parker, Senior DSP Technical Marketing Manager)

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Partner Solution Demos

Intel's synthetic-aperture radar (SAR) back-end processing demo on Intel Arria® 10 devices utilizing hard floating-point DSP blocks and OpenCL™

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Neuromorphic Processor in Intel Arria® 10 SoC for 100X Performance Gain for cyber security

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Hardware and Software Security Hardened Crypto Accelerators on Intel FPGAs and SoC

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Intel's Ultra-Wideband Channelizer on Intel Arria® 10 FPGAs with JESD204B Interface into Multi-GSPS ADC

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Cognitive Radio Solutions from Handhelds to Rack-mount Systems with RedHawk SDR and OpenCL™ Hardware Acceleration

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Programmable SDR Kit on a Cyclone® V SoC and ADI AD9361 HSMC

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Fully Programmable FPGA SoC and RF SDR and SatCom Development Kit

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Military Solution Reference Links

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