1. About This Application Note
This application note demonstrates how to use the Quartus® Prime software System Console to access hardware modules (that is, peripherals) that are instantiated in the FPGA design. Using the design example, you can interact with the Platform Designer system through a JTAG cable connection to the Intel FPGA. You send read and write transactions through the JTAG primary component to interact with the connected secondary peripherals.
System Console provides visibility into your design and allows you to perform system-level debug on an FPGA at run-time. System Console performs tests on debug-enabled Intel® FPGA IP. A variety of debug services provide read and write access to elements in your design.
- Perform board bring-up with finalized or partially complete designs.
- Automate run-time verification through scripting across multiple devices.
- Debug transceiver links, memory interfaces, and Ethernet interfaces.
- Integrate your debug IP into the debug platform.
- Perform system verification with MATLAB* and Simulink.
Figure 1. System Console Tools The System Console API supports services that access your design in operation.
System Console also provides the hardware debugging infrastructure to support operation and customization of debugging "toolkits." Toolkits are small applications that you can use to perform system-level debug of such elements as external memory interfaces, Ethernet interfaces, PCI Express interfaces, transceiver PHY interfaces, and various other debugging functions.