Scalable Scatter-Gather DMA FPGA IP Design Example User Guide
ID
823179
Date
9/22/2025
Public
3.7.1.1. Building the Software Application Project for Nios® V/m Processor
Open Ashling RiscFree* IDE for Altera FPGAs to import Nios® V/m processor BSP and application project to RiscFree* IDE.
- Click File > Import Nios V C Make Project..
- In the Import Nios V C Make Project window, browse and select the location of the project in software/app.
- Click Finish. The CMake driven application or BSP project is added to the Project Explorer.
- Right-click the project folder and click Build Project.