Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide

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ID 814550
Date 10/29/2025
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide A. Development Kit Components B. Developer Resources C. Safety and Regulatory Compliance Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Before You Begin 2.2. Handling the Board 2.3. Software and Driver Installation 2.4. Quick Start Guide
2.2. Handling the Board x
2.2.1. Handling the DIP Switches
2.3. Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Pro Edition Software 2.3.2. Installing the Ashling* RiscFree* Integrated Development Environment (IDE) 2.3.3. Installing the Development Kit 2.3.4. Installing the Intel® FPGA Download Cable II Driver
3. Development Kit Setup x
3.1. Installing the HPS Expansion Board (HPS-EB) 3.2. Default Settings 3.3. Powering Up the Development Kit 3.4. Performing Board Restore
3.4. Performing Board Restore x
3.4.1. Restoring Board QSPI Flash U10 with Default Factory Image 3.4.2. Restoring Board QSPI Flash U4 with Default Factory Image 3.4.3. Restoring SD Card with the Default Factory Image
4. Board Test System x
4.1. Set Up the BTS GUI Running Environment 4.2. Troubleshooting for Launching BTS 4.3. BTS Functionalities
4.1. Set Up the BTS GUI Running Environment x
4.1.1. Setting Up the Quartus® Prime Software for BTS Operation 4.1.2. Setting Up the Programmer 4.1.3. Running the BTS GUI on Windows 4.1.4. Running the BTS GUI on Linux
4.1.4. Running the BTS GUI on Linux x
4.1.4.1. Configuring the Linux UART Environment 4.1.4.2. Launching the BTS
4.3. BTS Functionalities x
4.3.1. Diagnostic GUI 4.3.2. Clock Controller GUI 4.3.3. Power Monitor GUI 4.3.4. MAX® 10 Controller GUI 4.3.5. Agilex™ 5 FPGA Functionality 4.3.6. Information Display 4.3.7. Migrating Development Kit Installer Package from v24.1 to v24.2
4.3.2. Clock Controller GUI x
4.3.2.1. Si5332 Clock 4.3.2.2. Si5518 Clock
4.3.3. Power Monitor GUI x
4.3.3.1. Power Monitor 4.3.3.2. Temperature Monitor
4.3.4. MAX® 10 Controller GUI x
4.3.4.1. Remote I/O Control 4.3.4.2. Expansion Board Control 4.3.4.3. System Control
4.3.4.1. Remote I/O Control x
4.3.4.1.1. Remote Control 4.3.4.1.2. MISC LED Control
4.3.4.1.1. Remote Control x
4.3.4.1.1.1. Push Button 4.3.4.1.1.2. User Switch 4.3.4.1.1.3. MSEL 4.3.4.1.1.4. Si569-1V8
4.3.5. Agilex™ 5 FPGA Functionality x
4.3.5.1. The GPIO Tab 4.3.5.2. The Memory Tab 4.3.5.3. The Transceiver Tab
4.3.5.2. The Memory Tab x
4.3.5.2.1. The DDR4 COMP Tab 4.3.5.2.2. The HPS DDR4 COMP Tab 4.3.5.2.3. The LPDDR4 COMP Tab
4.3.5.3. The Transceiver Tab x
4.3.5.3.1. QSFP Test 4.3.5.3.2. SFP+ Test 4.3.5.3.3. FMC+ Test 4.3.5.3.4. SMA Test
4.3.6. Information Display x
4.3.6.1. Sys Info 4.3.6.2. Connection 4.3.6.3. The Bottom Status Bar
5. Development Kit Hardware and Configuration x
5.1. Configuring the FPGA and Accessing HPS Debug Access Port by JTAG 5.2. Configuring the FPGA Device by Active Serial (AS) Modes (Default Mode) 5.3. Configuring the FPGA Device by Avalon® Streaming Modes 5.4. Expansion Boards
5.4. Expansion Boards x
5.4.1. HPS Expansion Board (HPS-EB) 5.4.2. HPS NAND Board (HPS-NB) 5.4.3. HPS Test Board (HPS-TB)
5.4.1. HPS Expansion Board (HPS-EB) x
5.4.1.1. Booting from SD Card using HPS Enablement DC
6. Custom Projects for the Development Kit x
6.1. Golden Top 6.2. EMIF Pin Swizzling Setting
A. Development Kit Components x
A.1. Board Overview A.2. System Management A.3. Power A.4. Clocks A.5. General Input/Output A.6. Input and Output Components A.7. Memory Interfaces A.8. Communication Interfaces A.9. Expansion Boards A.10. Connectors and Headers
A.2. System Management x
A.2.1. JTAG Master Sources
A.6. Input and Output Components x
A.6.1. Push Buttons A.6.2. Switches A.6.3. LEDs
A.8. Communication Interfaces x
A.8.1. QSFP+ A.8.2. SFP+ A.8.3. Ethernet A.8.4. FMC A.8.5. MIPI A.8.6. USB3.1 A.8.7. HPS IO48 Interface A.8.8. Serial Buses
A.9. Expansion Boards x
A.9.1. HPS Expansion Board (HPS-EB) A.9.2. HPS NAND Board (HPS-NB) A.9.3. HPS Test Board (HPS-TB)
C. Safety and Regulatory Compliance Information x
C.1. Safety and Regulatory Information C.2. Compliance Information
C.1. Safety and Regulatory Information x
C.1.1. Safety Warnings C.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information

7. Document Revision History for the Agilex™ 5 FPGA E-Series 065B Premium Development Kit User Guide

Document Version Changes
2025.10.29
  • Updated the Overview chapter:
    • Updated information in Block Diagram.
    • Updated information about transceiver and memory interfaces in Feature Summary.
  • Updated the Development Kit Setup chapter:
    • Updated Figure: Agilex™ 5 FPGA E-Series 065B Premium Development Kit—Factory Default Board Switches (Top View) in Default Settings for clarity.
  • Updated the appendix chapter Development Kit Components:
    • Updated the default frequency and removed footnote for LPDDR4_REFCLK_P/N in Table: Onboard Clock Sources in Clocks.
    • Updated the default frequency for LPDDR4_REFCLK in Figure: Clock Tree in Clocks.
    • Updated the description for SI5332A_1_IN5 in Table: MAX 10 in General Input/Output.
  • Updated document per latest branding standards.
  • Made editorial edits throughout the document.
2025.03.07
  • Updated the Getting Started chapter:
    • Retitled topic Quartus® Software and Driver Installation to Software and Driver Installation
    • Added new topics:
      • Before You Begin
      • Handling the Board
      • Handling the DIP Switches
      • Installing the Quartus® Prime Pro Edition Software
      • Installing the Development Kit
      • Installing the Intel® FPGA Download Cable Driver
    • Removed Design Examples.
  • Updated the Powering Up the Development Kit under the Development Kit Setup chapter for clarity.
  • Updated and retitled Installing Quartus® Prime Software to Setting Up the Quartus® Prime Software for BTS Operation under the Board Test System chapter.
  • Added new Appendix chapter—Developer Resources.
  • Restructured the document for clarity.
  • Made editorial edits throughout the document.
2024.08.05
  • Updated the information related to memory interfaces in the Feature Summary.
  • Updated the Development Kit Setup section:
    • Added new topics:
      • Installing HPS Expansion Board (HPS-EB)
      • Restoring SD Card with the Default Factory Image
    • Added new Figure: Agilex™ 5 FPGA E-Series 065B Premium Development Kit—Factory Default Board Switches (Top View).
    • Updated the SW23 functions in Table: Factory Default Switch Settings.
  • Updated the Board Test System section:
    • Added new topics:
      • Setting Up the Programmer
      • Running the BTS GUI on Linux
      • Configuring the Linux UART Environment
      • Migrating Development Kit Installer Package from v24.1 to v24.2
    • Removed the following topics in the Setting Up BTS GUI Running Environment section:
      • Downloading OpenJDK
      • Downloading OpenJFX
      • Installing OpenJDK and OpenJFX
    • Added new Figure: UART Port Configuration in Troubleshooting for Launching BTS.
    • Retitled the Running the BTS GUI topic to Running the BTS GUI on Windows.
    • Added new Figure: USB and Power Connection to Run BTS GUI.
    • Updated all figures in this section.
    • Updated Agilex 5 FPGA E-Series Test Functionality:
      • Retitled the Agilex 5 FPGA E-Series Test Functionality topic to Agilex 5 FPGA Functionality.
      • Added new topics:
        • The GPIO Tab
        • The Memory Tab
        • The DDR4 COMP Tab
        • The HPS DDR4 COMP Tab
        • The LPDDR4 COMP Tab
        • The Transceiver Tab
      • Removed the following topics:
        • DDR4 Test
        • HPS DDR4 Test
        • LPDDR4 Test
  • Updated the Development Kit Hardware and Configuration section:
    • Added new topics to Expansion Boards:
      • HPS Expansion Board (HPS-EB)
      • Booting from SD Card using HPS Enablement DC
      • HPS NAND Board (HPS-NB)
      • HPS Test Board (HPS-TB)
    • Retitled Table: HPS IO48 Pinout to HPS IO48 Pinout for HPS Expansion Board (HPS-EB).
  • Updated the Custom Projects for the Development Kit:
    • Added new topic—EMIF Pin Swizzling Setting.
  • Updated the Appendix A—Development Kit Components section:
    • Updated the SW23 description in Table: Switches of Switches.
    • Added a footnote to the LPDDR4_REFCLK_P/N signal in Clocks to state that the default frequency of this signal is 100 MHz in the development kit installer package v24.2 onwards.
    • Added a footnote to the LPDDR4_REFCLK_P/N signal in General Input/Output to state that the low output frequency of this signal is 100 MHz in the development kit installer package v24.2 onwards.
2024.05.24
  • Updated the following figures:
    • Figure: BTS GUI
    • Figure: The Entry of Launching Clock Application
    • Figure: The Entry of Launching Power Application
    • Figure: The Entry of Launching MAX® 10 Controller Application
    • Figure: The Entry of Launching Agilex™ Application
    • Figure: Bottom Status Bar
  • Made minor editorial edits to the document.
2024.05.20 Initial release.
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