SEU Mitigation User Guide: Agilex™ 5 FPGAs and SoCs

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ID 813649
Date 4/07/2025
Public
Document Table of Contents
Document Table of Contents x
1. Agilex™ 5 SEU Mitigation Overview 2. Agilex™ 5 CRAM Error Mitigation 3. Secure Device Manager ECC Error and SmartVID Errors Detection 4. Agilex™ 5 SEU Mitigation Implementation Guides 5. IP and Software References 6. Document Revision History for the SEU Mitigation User Guide: Agilex™ 5 FPGAs and SoCs
1. Agilex™ 5 SEU Mitigation Overview x
1.1. SEU Mitigation Techniques 1.2. Configuration RAM 1.3. Memory Blocks 1.4. Secure Device Manager ECC and SmartVID 1.5. Triple Modular Redundancy 1.6. Failure Rates
2. Agilex™ 5 CRAM Error Mitigation x
2.1. CRAM Error Detection and Correction 2.2. Error Message Queue 2.3. Scrubbing 2.4. SEU Sensitivity Processing 2.5. Design Hierarchy Sensitivity Classification 2.6. Evaluation of System Response to Upsets 2.7. Retrieving SEU Statistics using Mailbox Command
2.2. Error Message Queue x
2.2.1. SEU_ERROR Pin Behavior 2.2.2. Retrieving the Error Message Queue Contents Through Mailbox Command 2.2.3. Retrieving the Error Message Queue Content Using the HPS SDM Mailbox 2.2.4. Error Message Queue Bit Description
2.3. Scrubbing x
2.3.1. Internal Scrubbing 2.3.2. External Scrubbing
2.4. SEU Sensitivity Processing x
2.4.1. Advanced SEU Detection IP
2.4.1. Advanced SEU Detection IP x
2.4.1.1. Release Information for Advanced SEU Detection IP 2.4.1.2. On-Chip Lookup Sensitivity Processing 2.4.1.3. Off-Chip Lookup Sensitivity Processing 2.4.1.4. Sensitivity Map Header Lookup
2.5. Design Hierarchy Sensitivity Classification x
2.5.1. Hierarchy Tagging
2.6. Evaluation of System Response to Upsets x
2.6.1. Fault Injection Debugger
3. Secure Device Manager ECC Error and SmartVID Errors Detection x
3.1. SDM ECC Error Message Bits 3.2. SmartVID Error Message Bits 3.3. SDM ECC and SmartVID Error Signals Behavior
4. Agilex™ 5 SEU Mitigation Implementation Guides x
4.1. Setting the SEU_ERROR Pin 4.2. Setting Up the SEU Mitigation Features 4.3. Performing External Scrubbing 4.4. Assigning Regions for Hierarchy Tagging 4.5. Sensitivity Map Header 4.6. Using the Fault Injection Debugger
4.5. Sensitivity Map Header x
4.5.1. Programming the .smh File into Memory 4.5.2. Looking up the Sensitivity Map Header
4.5.2. Looking up the Sensitivity Map Header x
4.5.2.1. Sensitivity Map Header Revision 4 File Format Reference
4.6. Using the Fault Injection Debugger x
4.6.1. Launching and Setting Up the Fault Injection Debugger 4.6.2. Configuring Your Device using a Software Object File (.sof) 4.6.3. Constraining Regions for Fault Injection 4.6.4. Injecting Errors to Predefined Safe Locations 4.6.5. Blowing Fuse Bit to Enable Injecting All Error Types 4.6.6. Injecting Errors to Random Locations 4.6.7. Injecting Errors to Specific Locations 4.6.8. Injecting Double Adjacent Errors 4.6.9. Injecting SDM ECC Errors 4.6.10. Analyzing SEU or SDM ECC Errors Using Signal Tap
4.6.4. Injecting Errors to Predefined Safe Locations x
4.6.4.1. Listing the Predefined Safe Locations: Command-Line Interface 4.6.4.2. Injecting Errors to Predefined Safe Locations: Command-Line Interface 4.6.4.3. Injecting Errors to Predefined Safe Locations: GUI with Tcl Console 4.6.4.4. Injecting Error to Predefined Safe Locations: Mailbox Command
4.6.8. Injecting Double Adjacent Errors x
4.6.8.1. Injecting Double Adjacent Errors: Command-Line Interface 4.6.8.2. Injecting Double Adjacent Errors: GUI with Tcl Console
4.6.9. Injecting SDM ECC Errors x
4.6.9.1. Injecting SDM ECC Errors: Command-Line Interface 4.6.9.2. Injecting SDM ECC Errors: GUI with Tcl Console 4.6.9.3. Injecting SDM ECC Errors: Fault Injection Debugger 4.6.9.4. Injecting SDM ECC Errors: Mailbox Command
5. IP and Software References x
5.1. Advanced SEU Detection IP References 5.2. Fault Injection Debugger Software References
5.1. Advanced SEU Detection IP References x
5.1.1. Advanced SEU Detection IP Parameter Settings 5.1.2. Advanced SEU Detection IP Ports
5.2. Fault Injection Debugger Software References x
5.2.1. Fault Injection Debugger GUI Tool 5.2.2. Fault Injection Debugger Command-Line Interface
1. Agilex™ 5 SEU Mitigation Overview
2. Agilex™ 5 CRAM Error Mitigation
3. Secure Device Manager ECC Error and SmartVID Errors Detection
4. Agilex™ 5 SEU Mitigation Implementation Guides
5. IP and Software References
6. Document Revision History for the SEU Mitigation User Guide: Agilex™ 5 FPGAs and SoCs

4.6.4.4. Injecting Error to Predefined Safe Locations: Mailbox Command

To inject safe SEU errors, send the mailbox command with the following syntax: 
INSERT_SAFE_SEU_ERROR [0x41]

This command takes two 32-bit words as arguments, and you need to specify sector address, N_INJ, T, and CRAM_SEL0 or CRAM_SEL1 in the arguments. One of the options allows you to inject error immediately, before, or after detection cycle. For more details, refer to the Mailbox Client IP User Guide .

Table 14.  Mailbox Command Options
Command Option Definition
Sector Address
To list the valid sector index listed, you can use this command: 
quartus_fid -c 1 -i "@1=<sof_file>" --seu_list

For more details, refer to the Listing the Predefined Safe Locations: Command-Line Interface section.

T

Safe SEU error injection timing control.

  • 00 = Inject immediately
  • 01= Inject right before the next detection cycle
  • 10 = Inject after the detection cycle
  • 11 = Invalid
N_INJ

Number of CRAM location to inject -1.

  • 0 = one error
  • 1 = two errors
CRAM_SEL0 or CRAM_SEL1 Injection can only target to a predefined list of location for unused CRAMs are provided (identified by CRAM_SEL 0 to 7).
The following table provides examples of safe SEU injection scenarios.
Table 15.  Safe SEU Injection Scenarios
SEU Type Injection Method Description
Single-bit (correctable) Set N_INJ to 0 and set CRAM_SEL0. When N_INJ set to 0, CRAM_SEL1 is ignored.

To inject safe SEU error via the Configuration Debugger tool, send 0x41 as the Command Code and 0x30000 0x7 in the Parameter List field.

0x30000 refers to inject two single bit SEU errors immediately at sector 0x3, 0x7 refers to CRAM_SEL0 = 0x7 and CRAM_SEL1 is ignored.

Horizontal Double-bit adjacent (HDAE) (correctable) Set N_INJ to 1 and set CRAM_SEL0 and CRAM_SEL1 that is adjacent.

To inject safe SEU error via the Configuration Debugger tool, send 0x41 as the Command Code and 0x300010 0x54 in the Parameter List field.

0x30010 refers to inject two single bit SEU errors before next detection cycle at sector 0x3, 0x54 refers to CRAM_SEL0 = 0x4 and CRAM_SEL1 = 0x5.

Multibit (uncorrectable) Set N_INJ to 1 and set both CRAM_SEL that is non-adjacent.

To inject safe SEU error via the Configuration Debugger tool, send 0x41 as the Command Code and 0x30001 0x47 in the Parameter List field.

0x30001 refers to inject multibit uncorrectable error immediately at sector 0x3, 0x47 refers to CRAM_SEL0 = 0x7 and CRAM_SEL1 = 0x4.

Figure 19. INSERT_SAFE_SEU_ERROR (0x41) Mailbox Command in the Configuration Debugger Tool
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