1.6. Testing the F-Tile 25G Ethernet IP Hardware Design Example
After you compile the F-Tile 25G Ethernet IP core design example and configure it on your Agilex™ 7 device, you can use the System Console to program the IP core.
To turn on the System Console and test the hardware design example, follow these steps:
- In the Quartus® Prime Pro Edition software, select Tools > System Debugging Tools > System Console to launch the system console.
- In the Tcl Console pane, type cd hwtest to change directory to /hardware_test_design/hwtest.
- Type source main.tcl to open a connection to the JTAG master.
Follow the test procedure in the Hardware Testing section of the design example and observe the test results in the System Console.