Nios® V Processor Software Developer Handbook

ID 743810
Date 10/02/2023
Public

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13.6.2.1. Configurable Example Design

The Configurable Example Design is an example design that supports pre-built system configurations and is pre-installed in the Intel® Quartus® Prime software. Each Configurable Example Design supports different sets of configurable options.

The figure below shows the Agilex 7 – Configurable Example Design on F-series FPGA Development Kit. You can select any following preferred configurations:

  • NIOS V core
  • Debug logic for NIOS V core
  • Total Memory Depth of On-Chip Memory (OCM)
  • PIO IP for LED Connection
Figure 24. Configurable Options in Configurable Example Designs