Nios® V Embedded Processor Design Handbook

ID 726952
Date 5/26/2023

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.6.1. Nios V Processor Application Executes in-place from OCRAM

The on-chip memory is initialized during FPGA configuration with data from a Nios V application image. This data is built into the FPGA configuration bitstream. This process eliminates the need for a boot copier, as the Nios V application is already in place at system reset.

Figure 68. Nios V Application Executes In-Place from OCRAM when FPGA Device Configured from QSPI Flash
Figure 69. Design, Configuration and Booting Flow