F-Tile Ethernet Multirate IP User Guide

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ID 714307
Date 10/08/2025
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Interface Overview 3. Parameters 4. Designing with the IP Core 5. Block Description 6. Configuration Registers 7. F-Tile Ethernet Multirate Altera FPGA IP User Guide Archives 8. Document Revision History for the F-Tile Ethernet Multirate Altera FPGA IP User Guide
1. Introduction x
1.1. Overview 1.2. Release Information 1.3. Device Family Support 1.4. Device Speed Grade Support 1.5. Resource Utilization 1.6. Related Documentation 1.7. F-Tile Ethernet Multirate IP Core Features and Constraints 1.8. F-Tile Ethernet Multirate IP Core Concepts
1.8. F-Tile Ethernet Multirate IP Core Concepts x
1.8.1. Reconfiguration Group 1.8.2. Base Profile 1.8.3. Secondary Profile 1.8.4. Secondary Profile Group 1.8.5. Startup Profile 1.8.6. Supported Reconfiguration Groups 1.8.7. PTP Timestamp Accuracy Support 1.8.8. Transceiver Lane Mapping
2. Interface Overview x
2.1. Port Numbering Scheme 2.2. Clock Signals 2.3. Reset Signals 2.4. Fractured MAC Segmented Interface for FGT Transceivers 2.5. Fractured MAC Segmented Interface for FHT Transceivers 2.6. Fractured MAC Avalon ST Client Interface for FGT Transceivers 2.7. Fractured MAC Avalon ST Client Interface for FHT Transceivers 2.8. Fractured MII PCS-Only Interface for FGT Transceivers 2.9. Fractured MII PCS-Only Interface for FHT Transceivers 2.10. Fractured PCS66 Interface for OTN/FlexE for FGT Transceivers 2.11. Fractured PCS66 Interface for OTN/FlexE for FHT Transceivers 2.12. MAC Flow Control Interface 2.13. Status Interface 2.14. Avalon® Memory-Mapped Reconfiguration Interfaces 2.15. Auto-Negotiation and Link Training Interface 2.16. Precision Time Protocol Interface
2.16. Precision Time Protocol Interface x
2.16.1. PTP Clock Interface 2.16.2. Time-of-Day Interface 2.16.3. TX 2-Step Timestamp Interface 2.16.4. TX 1-Step Timestamp Interface 2.16.5. RX Timestamp Interface 2.16.6. PTP Status Interface 2.16.7. PTP Tile Interface
4. Designing with the IP Core x
4.1. Specifying the IP Core Parameters and Options 4.2. Generated File Structure
4.1. Specifying the IP Core Parameters and Options x
4.1.1. Reference and System PLL Clock for your IP Design
5. Block Description x
5.1. Precision Time Protocol
1. Introduction
2. Interface Overview
3. Parameters
4. Designing with the IP Core
5. Block Description
6. Configuration Registers
7. F-Tile Ethernet Multirate Altera FPGA IP User Guide Archives
8. Document Revision History for the F-Tile Ethernet Multirate Altera FPGA IP User Guide

1.8.6. Supported Reconfiguration Groups

This section specifies the supported reconfiguration groups for FGT and FHT transceivers.
Table 6.  Available Reconfiguration Groups for FGT Transceivers
Reconfiguration Group Maximum Number of Lanes Modulation System PLL Frequency (in MHz) Supported Profiles 1 Supported FEC Types Supported AN_CHAN_GUI Values
25GE-1 Reconfigurable 1 NRZ 806/830 1x25GE-1
  • No FEC
  • FE-FEC
  • KR-FEC
  • IEEE 802.3 BASE-R Firecode (CL74)
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134) 2 3
 0
1x10GE-1 No FEC 0
50GE-1 Reconfigurable 1 NRZ/PAM4 830 1x50GE-1
  • KP-FEC
  • LL-FEC
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0
1x25GE-1
  • No-FEC
  • FC-FEC
  • KR-FEC
  • IEEE 802.3 RS(544,514) (CL134) 2 3
 0
1x10GE-1
  • No-FEC
 0
100GE-4 Reconfigurable 4 NRZ/PAM4 830 1x100GE-4
  • No-FEC
  • KR-FEC
  • KP-FEC
 0,1,2,3
1x40GE-4
  • No-FEC
 0,1,2,3
1x100GE-2
  • KP-FEC
  • LL-FEC
 0,1
1x25GE-1
  • No-FEC
  • FC-FEC
  • KR-FEC
 0,1,2,3
1x100E-1 No-FEC 0,1,2,3
1x50GE-1
  • KP-FEC
  • LL-FEC
 0,1
100GE-2 Reconfigurable 2 NRZ/PAM4 830 1x100GE-2
  • kP- FEC
  • LL-FEC
 0,1
2x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
2x25GE-1
  • None
  • IEEE 802.3 BASE-R Firecode (CL74)
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134) 2 3
 0,1
2x10GE-1
  • None
 0,1
1x50GE-2
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
400GE-8 Reconfigurable 8 PAM4 830 1x400GE-8
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3,4,5,6,7
2x200GE-4
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3,4,5,6,7
4x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3,4,5,6,7
200GE-4 Reconfigurable 4 NRZ/PAM4 830 1x200GE-4
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
2x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
1x100GE-4
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
2x50GE-2
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
4x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
Table 7.  Available Reconfiguration Groups Using FHT Transceivers
Reconfiguration Group Maximum Number of Lanes Modulation System PLL Frequency (in MHz) Supported Profiles1 Supported FEC Types Supported AN_CHAN_GUI Values
50GE-1 Reconfigurable 1 NRZ/PAM4 830 1x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0
1x25GE-1
  • None
  • IEEE 802.3 BASE-R Firecode (CL74)
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)3
 0
100GE-4 Reconfigurable 4 NRZ/PAM4 830 1x100GE-4
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x50GE-2
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
1x100GE-1
  • IEEE 802.3 RS(544,514) (CL134)
 0
1x25GE-1
  • None
  • IEEE 802.3 BASE-R Firecode (CL74)
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)3
 0,1,2,3
1x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
100GE-2 Reconfigurable 2 NRZ/PAM4 830 1x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
1x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
1x100GE-1
  • IEEE 802.3 RS(544,514) (CL134)
 0
1x50GE-2
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
1x25GE-1
  • None
  • IEEE 802.3 BASE-R Firecode (CL74)
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)3
 0,1
100GE-1 Reconfigurable 1 NRZ/PAM4 830 1x100GE-1
  • IEEE 802.3 RS(544,514) (CL134)
 0
1x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0
1x25GE-1
  • None
  • IEEE 802.3 BASE-R Firecode (CL74)
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)3
 0
400GE-4 Reconfigurable 4 PAM4 830 1x400GE-4
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x200GE-2
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x200GE-4
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
1x100GE-1
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
200GE-4 Reconfigurable 4 NRZ/PAM4 830 1x200GE-4
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
1x200GE-2
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
1x100GE-1
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
1x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
1x100GE-4
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x50GE-2
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1,2,3
1x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1,2,3
200GE-2 Reconfigurable 2 NRZ/PAM4 830 1x200GE-2
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
1x100GE-2
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
1x100GE-1
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
1x50GE-1
  • IEEE 802.3 RS(544,514) (CL134)
  • Ethernet Technology Consortium RS(272, 258)
 0,1
1x50GE-2
  • None
  • IEEE 802.3 RS(528,514) (CL91)
  • IEEE 802.3 RS(544,514) (CL134)
 0,1
1 The highlighted profile is the group's base profile for the specific reconfiguration group.
2 Applicable for System PLL rate of 830 MHz frequency, and for MAC and PCS client interface.
3 PTP feature is not available for this RS-FEC configuration.
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