F-Tile JESD204C Intel® FPGA IP User Guide

ID 691272
Date 4/29/2024
Document Table of Contents

5.6.1. Multi-Device DAC Application for Subclass 1

SYSREF is the reference timing that start the LEMC counters in both converter devices and FPGA. You must determine the common E parameters for converter devices and logic devices, which is greater than the propagation time from TX to RX.
Figure 12. Multi-Device DAC Synchronization