DisplayPort Stratix® 10 FPGA IP Design Example User Guide

ID 683887
Date 4/10/2024
Document Table of Contents

1. DisplayPort Intel® FPGA IP Design Example Quick Start Guide

Updated for:
Intel® Quartus® Prime Design Suite 24.1
IP Version 20.0.1
The DisplayPort Intel® FPGA IP design examples for Stratix® 10 devices feature a simulating testbench and a hardware design that supports compilation and hardware testing.

The DisplayPort Intel® FPGA IP offers the following design examples:

When you generate a design example, the parameter editor automatically creates the files necessary to simulate, compile, and test the design in hardware.
Figure 1. Development Steps