F-Tile Avalon® Streaming IP for PCI Express* Release Notes
ID
683886
Date
9/29/2025
Public
1.1. F-Tile Avalon® Streaming IP for PCI Express: IP Core v12.4.0
1.2. F-Tile Avalon® Streaming IP for PCI Express: IP Core v12.3.0
1.3. F-Tile Avalon® Streaming IP for PCI Express : IP Core v12.2.0
1.4. F-Tile Avalon Streaming IP for PCI Express: IP Core v12.1.0
1.5. F-Tile Avalon Streaming IP for PCI Express : IP Core v12.0.0
1.6. F-Tile Avalon Streaming IP for PCI Express : IP Core v11.0.0
1.7. F-Tile Avalon Streaming IP for PCI Express : IP Core v10.0.0
1.8. F-Tile Avalon Streaming IP for PCI Express : IP Core v9.0.0
1.9. F-Tile Avalon Streaming IP for PCI Express : IP Core v8.1.0
1.10. F-Tile Avalon Streaming IP for PCI Express : IP Core v8.0.0
1.11. F-Tile Avalon Streaming IP for PCI Express : IP Core v7.0.0
1.12. F-Tile Avalon Streaming IP for PCI Express : IP Core v6.0.0
1.13. F-Tile Avalon Streaming IP for PCI Express : IP Core v5.0.0
1.14. F-Tile Avalon Streaming IP for PCI Express : IP Core v4.0.0
1.15. F-Tile Avalon Streaming IP for PCI Express : IP Core v3.0.0
1.16. F-Tile Avalon Streaming IP for PCI Express : IP Core v2.0.0
1.17. F-Tile Avalon Streaming IP for PCI Express : User Guide Archives
1.2. F-Tile Avalon® Streaming IP for PCI Express: IP Core v12.3.0
| Quartus® Prime Version | Description | Impact |
|---|---|---|
| 25.1 | Provide an option to allow write access to the Device Serial Number Capability (DEVSER) register in the IP Parameter Editor. | This option allows you to update the Device Serial Number during runtime via the HIP Reconfiguration Interface. |
| Introduced the PCIe 2x8 configuration (Topology S) for Root Port mode. | This topology allows you to implement two PCIe 3.0 x8 Root Ports or two PCIe 4.0 x8 Root Ports in a single F-Tile. |